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Mercurial > hg > plan9front / sys/src/9/bcm/trap.c

revision 7150: 94aebeed6c4a
parent 6873: cd256cc052e3
child 7155: 85c4b38d9a82
     1.1--- a/sys/src/9/bcm/trap.c
     1.2+++ b/sys/src/9/bcm/trap.c
     1.3@@ -12,18 +12,8 @@
     1.4 
     1.5 #include "arm.h"
     1.6 
     1.7-#define INTREGS		(VIRTIO+0xB200)
     1.8-
     1.9-typedef struct Intregs Intregs;
    1.10-typedef struct Vctl Vctl;
    1.11-
    1.12 enum {
    1.13 	Nvec = 8,		/* # of vectors at start of lexception.s */
    1.14-	Fiqenable = 1<<7,
    1.15-
    1.16-	Localtimerint	= 0x40,
    1.17-	Localmboxint	= 0x50,
    1.18-	Localintpending	= 0x60,
    1.19 };
    1.20 
    1.21 /*
    1.22@@ -34,31 +24,6 @@ typedef struct Vpage0 {
    1.23 	u32int	vtable[Nvec];
    1.24 } Vpage0;
    1.25 
    1.26-/*
    1.27- * interrupt control registers
    1.28- */
    1.29-struct Intregs {
    1.30-	u32int	ARMpending;
    1.31-	u32int	GPUpending[2];
    1.32-	u32int	FIQctl;
    1.33-	u32int	GPUenable[2];
    1.34-	u32int	ARMenable;
    1.35-	u32int	GPUdisable[2];
    1.36-	u32int	ARMdisable;
    1.37-};
    1.38-
    1.39-struct Vctl {
    1.40-	Vctl	*next;
    1.41-	int	irq;
    1.42-	u32int	*reg;
    1.43-	u32int	mask;
    1.44-	void	(*f)(Ureg*, void*);
    1.45-	void	*a;
    1.46-};
    1.47-
    1.48-static Lock vctllock;
    1.49-static Vctl *vctl[MAXMACH], *vfiq;
    1.50-
    1.51 static char *trapnames[PsrMask+1] = {
    1.52 	[ PsrMusr ] "user mode",
    1.53 	[ PsrMfiq ] "fiq interrupt",
    1.54@@ -70,6 +35,7 @@ static char *trapnames[PsrMask+1] = {
    1.55 	[ PsrMsys ] "sys trap",
    1.56 };
    1.57 
    1.58+extern int irq(Ureg*);
    1.59 extern int notify(Ureg*);
    1.60 
    1.61 /*
    1.62@@ -102,127 +68,6 @@ trapinit(void)
    1.63 	coherence();
    1.64 }
    1.65 
    1.66-void
    1.67-intrcpushutdown(void)
    1.68-{
    1.69-	u32int *enable;
    1.70-
    1.71-	if(soc.armlocal == 0)
    1.72-		return;
    1.73-	enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
    1.74-	*enable = 0;
    1.75-	if(m->machno){
    1.76-		enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
    1.77-		*enable = 1;
    1.78-	}
    1.79-}
    1.80-
    1.81-void
    1.82-intrsoff(void)
    1.83-{
    1.84-	Intregs *ip;
    1.85-	int disable;
    1.86-
    1.87-	ip = (Intregs*)INTREGS;
    1.88-	disable = ~0;
    1.89-	ip->GPUdisable[0] = disable;
    1.90-	ip->GPUdisable[1] = disable;
    1.91-	ip->ARMdisable = disable;
    1.92-	ip->FIQctl = 0;
    1.93-}
    1.94-
    1.95-/*
    1.96- *  called by trap to handle irq interrupts.
    1.97- *  returns true iff a clock interrupt, thus maybe reschedule.
    1.98- */
    1.99-static int
   1.100-irq(Ureg* ureg)
   1.101-{
   1.102-	Vctl *v;
   1.103-	int clockintr;
   1.104-
   1.105-	clockintr = 0;
   1.106-	for(v = vctl[m->machno]; v != nil; v = v->next)
   1.107-		if((*v->reg & v->mask) != 0){
   1.108-			coherence();
   1.109-			v->f(ureg, v->a);
   1.110-			coherence();
   1.111-			if(v->irq == IRQclock || v->irq == IRQcntps || v->irq == IRQcntpns)
   1.112-				clockintr = 1;
   1.113-		}
   1.114-	return clockintr;
   1.115-}
   1.116-
   1.117-/*
   1.118- * called direct from lexception.s to handle fiq interrupt.
   1.119- */
   1.120-void
   1.121-fiq(Ureg *ureg)
   1.122-{
   1.123-	Vctl *v;
   1.124-
   1.125-	v = vfiq;
   1.126-	if(v == nil)
   1.127-		panic("cpu%d: unexpected item in bagging area", m->machno);
   1.128-	m->intr++;
   1.129-	ureg->pc -= 4;
   1.130-	coherence();
   1.131-	v->f(ureg, v->a);
   1.132-	coherence();
   1.133-}
   1.134-
   1.135-void
   1.136-irqenable(int irq, void (*f)(Ureg*, void*), void* a)
   1.137-{
   1.138-	Vctl *v;
   1.139-	Intregs *ip;
   1.140-	u32int *enable;
   1.141-	int cpu;
   1.142-
   1.143-	ip = (Intregs*)INTREGS;
   1.144-	if((v = xalloc(sizeof(Vctl))) == nil)
   1.145-		panic("irqenable: no mem");
   1.146-	cpu = 0;
   1.147-	v->irq = irq;
   1.148-	if(irq >= IRQlocal){
   1.149-		cpu = m->machno;
   1.150-		v->reg = (u32int*)(ARMLOCAL + Localintpending) + cpu;
   1.151-		if(irq >= IRQmbox0)
   1.152-			enable = (u32int*)(ARMLOCAL + Localmboxint) + cpu;
   1.153-		else
   1.154-			enable = (u32int*)(ARMLOCAL + Localtimerint) + cpu;
   1.155-		v->mask = 1 << (irq - IRQlocal);
   1.156-	}else if(irq >= IRQbasic){
   1.157-		enable = &ip->ARMenable;
   1.158-		v->reg = &ip->ARMpending;
   1.159-		v->mask = 1 << (irq - IRQbasic);
   1.160-	}else{
   1.161-		enable = &ip->GPUenable[irq/32];
   1.162-		v->reg = &ip->GPUpending[irq/32];
   1.163-		v->mask = 1 << (irq % 32);
   1.164-	}
   1.165-	v->f = f;
   1.166-	v->a = a;
   1.167-	lock(&vctllock);
   1.168-	if(irq == IRQfiq){
   1.169-		assert((ip->FIQctl & Fiqenable) == 0);
   1.170-		assert((*enable & v->mask) == 0);
   1.171-		vfiq = v;
   1.172-		ip->FIQctl = Fiqenable | irq;
   1.173-	}else{
   1.174-		v->next = vctl[cpu];
   1.175-		vctl[cpu] = v;
   1.176-		if(irq >= IRQmbox0){
   1.177-			if(irq <= IRQmbox3)
   1.178-				*enable |= 1 << (irq - IRQmbox0);
   1.179-		}else if(irq >= IRQlocal)
   1.180-			*enable |= 1 << (irq - IRQlocal);
   1.181-		else
   1.182-			*enable = v->mask;
   1.183-	}
   1.184-	unlock(&vctllock);
   1.185-}
   1.186-
   1.187 static char *
   1.188 trapname(int psr)
   1.189 {