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Mercurial > hg > plan9front / changeset: merge

changeset 7306: 31c5e11c82f8
parent 7303: bf85dd404c39
parent 7305: 617312eef5e1
tag:tip
author: cinap_lenrek@felloff.net
date: Thu, 11 Jul 2019 07:49:52 +0200
files: sys/src/9/pc/ethermii.c sys/src/9/pc/ethermii.h sys/src/9/teg2/ethermii.c sys/src/9/teg2/ethermii.h
description: merge
     1.1--- a/sys/src/9/pc/ether8169.c
     1.2+++ b/sys/src/9/pc/ether8169.c
     1.3@@ -16,8 +16,7 @@
     1.4 #include "../port/error.h"
     1.5 #include "../port/netif.h"
     1.6 #include "../port/etherif.h"
     1.7-
     1.8-#include "ethermii.h"
     1.9+#include "../port/ethermii.h"
    1.10 
    1.11 enum {					/* registers */
    1.12 	Idr0		= 0x00,		/* MAC address */
     2.1--- a/sys/src/9/pc/etherdp83820.c
     2.2+++ b/sys/src/9/pc/etherdp83820.c
     2.3@@ -13,8 +13,7 @@
     2.4 #include "../port/error.h"
     2.5 #include "../port/netif.h"
     2.6 #include "../port/etherif.h"
     2.7-
     2.8-#include "ethermii.h"
     2.9+#include "../port/ethermii.h"
    2.10 
    2.11 enum {					/* Registers */
    2.12 	Cr		= 0x00,		/* Command */
     3.1--- a/sys/src/9/pc/etherigbe.c
     3.2+++ b/sys/src/9/pc/etherigbe.c
     3.3@@ -25,8 +25,7 @@
     3.4 #include "../port/error.h"
     3.5 #include "../port/netif.h"
     3.6 #include "../port/etherif.h"
     3.7-
     3.8-#include "ethermii.h"
     3.9+#include "../port/ethermii.h"
    3.10 
    3.11 enum {
    3.12 	i82542		= (0x1000<<16)|0x8086,
     4.1--- a/sys/src/9/pc/ethervgbe.c
     4.2+++ b/sys/src/9/pc/ethervgbe.c
     4.3@@ -30,8 +30,7 @@
     4.4 #include "../port/error.h"
     4.5 #include "../port/netif.h"
     4.6 #include "../port/etherif.h"
     4.7-
     4.8-#include "ethermii.h"
     4.9+#include "../port/ethermii.h"
    4.10 
    4.11 #define DEBUG
    4.12 
     5.1--- a/sys/src/9/pc/ethervt6102.c
     5.2+++ b/sys/src/9/pc/ethervt6102.c
     5.3@@ -18,8 +18,7 @@
     5.4 #include "../port/error.h"
     5.5 #include "../port/netif.h"
     5.6 #include "../port/etherif.h"
     5.7-
     5.8-#include "ethermii.h"
     5.9+#include "../port/ethermii.h"
    5.10 
    5.11 enum {
    5.12 	Par0		= 0x00,		/* Ethernet Address */
     6.1--- a/sys/src/9/pc/ethervt6105m.c
     6.2+++ b/sys/src/9/pc/ethervt6105m.c
     6.3@@ -21,8 +21,7 @@
     6.4 #include "../port/error.h"
     6.5 #include "../port/netif.h"
     6.6 #include "../port/etherif.h"
     6.7-
     6.8-#include "ethermii.h"
     6.9+#include "../port/ethermii.h"
    6.10 
    6.11 enum {
    6.12 	Par0		= 0x00,			/* Ethernet Address */
     7.1--- a/sys/src/9/pc/mkfile
     7.2+++ b/sys/src/9/pc/mkfile
     7.3@@ -123,13 +123,12 @@ devusb.$O usbuhci.$O usbohci.$O usbehci.
     7.4 usbehci.$O usbehcipc.$O:	usbehci.h
     7.5 trap.$O:			/sys/include/tos.h
     7.6 uartaxp.$O:			uartaxp.i
     7.7-ethermii.$O:			ethermii.h
     7.8-ether8169.$O:			ethermii.h
     7.9-etherdp83820.$O:		ethermii.h
    7.10-etherigbe.$O:			ethermii.h
    7.11-ethervgbe.$O:			ethermii.h
    7.12-ethervt6102.$O:			ethermii.h
    7.13-ethervt6105m.$O:		ethermii.h
    7.14+ether8169.$O:			../port/ethermii.h
    7.15+etherdp83820.$O:		../port/ethermii.h
    7.16+etherigbe.$O:			../port/ethermii.h
    7.17+ethervgbe.$O:			../port/ethermii.h
    7.18+ethervt6102.$O:			../port/ethermii.h
    7.19+ethervt6105m.$O:		../port/ethermii.h
    7.20 etherm10g.$O:			etherm10g2k.i etherm10g4k.i
    7.21 etheriwl.$O:			../port/wifi.h
    7.22 etherwpi.$O:			../port/wifi.h
     8.1--- a/sys/src/9/pc64/mkfile
     8.2+++ b/sys/src/9/pc64/mkfile
     8.3@@ -85,7 +85,7 @@ install:V:	$p$CONF
     8.4 
     8.5 
     8.6 # copies generated by the rule below
     8.7-PCHEADERS=usbehci.h screen.h ethermii.h mp.h io.h ahci.h \
     8.8+PCHEADERS=usbehci.h screen.h mp.h io.h ahci.h \
     8.9 	yukdump.h
    8.10 
    8.11 REPCH=`{echo $PCHEADERS | sed 's/\.h//g; s/ /|/g'}
    8.12@@ -124,13 +124,12 @@ usbehci.$O usbehcipc.$O:	usbehci.h
    8.13 
    8.14 trap.$O:			/sys/include/tos.h
    8.15 
    8.16-ethermii.$O:			ethermii.h
    8.17-ether8169.$O:			ethermii.h
    8.18-etherdp83820.$O:		ethermii.h
    8.19-etherigbe.$O:			ethermii.h
    8.20-ethervgbe.$O:			ethermii.h
    8.21-ethervt6102.$O:			ethermii.h
    8.22-ethervt6105m.$O:		ethermii.h
    8.23+ether8169.$O:			../port/ethermii.h
    8.24+etherdp83820.$O:		../port/ethermii.h
    8.25+etherigbe.$O:			../port/ethermii.h
    8.26+ethervgbe.$O:			../port/ethermii.h
    8.27+ethervt6102.$O:			../port/ethermii.h
    8.28+ethervt6105m.$O:		../port/ethermii.h
    8.29 
    8.30 etheriwl.$O:			../port/wifi.h
    8.31 etherwpi.$O:			../port/wifi.h
     9.1--- a/sys/src/9/port/devuart.c
     9.2+++ b/sys/src/9/port/devuart.c
     9.3@@ -644,7 +644,7 @@ uartkick(void *v)
     9.4 {
     9.5 	Uart *p = v;
     9.6 
     9.7-	if(p->blocked)
     9.8+	if(!p->enabled || p->blocked)
     9.9 		return;
    9.10 
    9.11 	ilock(&p->tlock);
    10.1rename from sys/src/9/pc/ethermii.c
    10.2rename to sys/src/9/port/ethermii.c
    11.1rename from sys/src/9/pc/ethermii.h
    11.2rename to sys/src/9/port/ethermii.h
    12.1--- a/sys/src/9/port/portmkfile
    12.2+++ b/sys/src/9/port/portmkfile
    12.3@@ -105,3 +105,4 @@ devusb.$O:	../port/usb.h
    12.4 devether.$O ethersink.$O:	../port/etherif.h ../port/netif.h
    12.5 wifi.$O:	../port/etherif.h ../port/netif.h ../port/wifi.h /sys/include/libsec.h
    12.6 wifi.$O:	../ip/ip.h ../ip/ipv6.h
    12.7+ethermii.$O:	../port/ethermii.h
    13.1--- a/sys/src/9/teg2/ether8169.c
    13.2+++ b/sys/src/9/teg2/ether8169.c
    13.3@@ -16,8 +16,7 @@
    13.4 #include "../port/error.h"
    13.5 #include "../port/netif.h"
    13.6 #include "../port/etherif.h"
    13.7-
    13.8-#include "ethermii.h"
    13.9+#include "../port/ethermii.h"
   13.10 
   13.11 typedef struct Ctlr Ctlr;
   13.12 typedef struct D D;			/* Transmit/Receive Descriptor */
    14.1deleted file mode 100644
    14.2--- a/sys/src/9/teg2/ethermii.c
    14.3+++ /dev/null
    14.4@@ -1,235 +0,0 @@
    14.5-#include "u.h"
    14.6-#include "../port/lib.h"
    14.7-#include "mem.h"
    14.8-#include "dat.h"
    14.9-#include "fns.h"
   14.10-#include "io.h"
   14.11-#include "../port/error.h"
   14.12-#include "../port/netif.h"
   14.13-#include "../port/etherif.h"
   14.14-
   14.15-#include "ethermii.h"
   14.16-
   14.17-int
   14.18-mii(Mii* mii, int mask)
   14.19-{
   14.20-	MiiPhy *miiphy;
   14.21-	int bit, oui, phyno, r, rmask;
   14.22-
   14.23-	/*
   14.24-	 * Probe through mii for PHYs in mask;
   14.25-	 * return the mask of those found in the current probe.
   14.26-	 * If the PHY has not already been probed, update
   14.27-	 * the Mii information.
   14.28-	 */
   14.29-	rmask = 0;
   14.30-	for(phyno = 0; phyno < NMiiPhy; phyno++){
   14.31-		bit = 1<<phyno;
   14.32-		if(!(mask & bit))
   14.33-			continue;
   14.34-		if(mii->mask & bit){
   14.35-			rmask |= bit;
   14.36-			continue;
   14.37-		}
   14.38-		if(mii->mir(mii, phyno, Bmsr) == -1)
   14.39-			continue;
   14.40-		r = mii->mir(mii, phyno, Phyidr1);
   14.41-		oui = (r & 0x3FFF)<<6;
   14.42-		r = mii->mir(mii, phyno, Phyidr2);
   14.43-		oui |= r>>10;
   14.44-		if(oui == 0xFFFFF || oui == 0)
   14.45-			continue;
   14.46-
   14.47-		if((miiphy = malloc(sizeof(MiiPhy))) == nil)
   14.48-			continue;
   14.49-
   14.50-		miiphy->mii = mii;
   14.51-		miiphy->oui = oui;
   14.52-		miiphy->phyno = phyno;
   14.53-
   14.54-		miiphy->anar = ~0;
   14.55-		miiphy->fc = ~0;
   14.56-		miiphy->mscr = ~0;
   14.57-
   14.58-		mii->phy[phyno] = miiphy;
   14.59-		if(mii->curphy == nil)
   14.60-			mii->curphy = miiphy;
   14.61-		mii->mask |= bit;
   14.62-		mii->nphy++;
   14.63-
   14.64-		rmask |= bit;
   14.65-	}
   14.66-	return rmask;
   14.67-}
   14.68-
   14.69-int
   14.70-miimir(Mii* mii, int r)
   14.71-{
   14.72-	if(mii == nil || mii->ctlr == nil || mii->curphy == nil)
   14.73-		return -1;
   14.74-	return mii->mir(mii, mii->curphy->phyno, r);
   14.75-}
   14.76-
   14.77-int
   14.78-miimiw(Mii* mii, int r, int data)
   14.79-{
   14.80-	if(mii == nil || mii->ctlr == nil || mii->curphy == nil)
   14.81-		return -1;
   14.82-	return mii->miw(mii, mii->curphy->phyno, r, data);
   14.83-}
   14.84-
   14.85-int
   14.86-miireset(Mii* mii)
   14.87-{
   14.88-	int bmcr;
   14.89-
   14.90-	if(mii == nil || mii->ctlr == nil || mii->curphy == nil)
   14.91-		return -1;
   14.92-	bmcr = mii->mir(mii, mii->curphy->phyno, Bmcr);
   14.93-	bmcr |= BmcrR;
   14.94-	mii->miw(mii, mii->curphy->phyno, Bmcr, bmcr);
   14.95-	microdelay(1);
   14.96-
   14.97-	return 0;
   14.98-}
   14.99-
  14.100-int
  14.101-miiane(Mii* mii, int a, int p, int e)
  14.102-{
  14.103-	int anar, bmsr, mscr, r, phyno;
  14.104-
  14.105-	if(mii == nil || mii->ctlr == nil || mii->curphy == nil)
  14.106-		return -1;
  14.107-	phyno = mii->curphy->phyno;
  14.108-
  14.109-	bmsr = mii->mir(mii, phyno, Bmsr);
  14.110-	if(!(bmsr & BmsrAna))
  14.111-		return -1;
  14.112-
  14.113-	if(a != ~0)
  14.114-		anar = (AnaTXFD|AnaTXHD|Ana10FD|Ana10HD) & a;
  14.115-	else if(mii->curphy->anar != ~0)
  14.116-		anar = mii->curphy->anar;
  14.117-	else{
  14.118-		anar = mii->mir(mii, phyno, Anar);
  14.119-		anar &= ~(AnaAP|AnaP|AnaT4|AnaTXFD|AnaTXHD|Ana10FD|Ana10HD);
  14.120-		if(bmsr & Bmsr10THD)
  14.121-			anar |= Ana10HD;
  14.122-		if(bmsr & Bmsr10TFD)
  14.123-			anar |= Ana10FD;
  14.124-		if(bmsr & Bmsr100TXHD)
  14.125-			anar |= AnaTXHD;
  14.126-		if(bmsr & Bmsr100TXFD)
  14.127-			anar |= AnaTXFD;
  14.128-	}
  14.129-	mii->curphy->anar = anar;
  14.130-
  14.131-	if(p != ~0)
  14.132-		anar |= (AnaAP|AnaP) & p;
  14.133-	else if(mii->curphy->fc != ~0)
  14.134-		anar |= mii->curphy->fc;
  14.135-	mii->curphy->fc = (AnaAP|AnaP) & anar;
  14.136-
  14.137-	if(bmsr & BmsrEs){
  14.138-		mscr = mii->mir(mii, phyno, Mscr);
  14.139-		mscr &= ~(Mscr1000TFD|Mscr1000THD);
  14.140-		if(e != ~0)
  14.141-			mscr |= (Mscr1000TFD|Mscr1000THD) & e;
  14.142-		else if(mii->curphy->mscr != ~0)
  14.143-			mscr = mii->curphy->mscr;
  14.144-		else{
  14.145-			r = mii->mir(mii, phyno, Esr);
  14.146-			if(r & Esr1000THD)
  14.147-				mscr |= Mscr1000THD;
  14.148-			if(r & Esr1000TFD)
  14.149-				mscr |= Mscr1000TFD;
  14.150-		}
  14.151-		mii->curphy->mscr = mscr;
  14.152-		mii->miw(mii, phyno, Mscr, mscr);
  14.153-	}
  14.154-	mii->miw(mii, phyno, Anar, anar);
  14.155-
  14.156-	r = mii->mir(mii, phyno, Bmcr);
  14.157-	if(!(r & BmcrR)){
  14.158-		r |= BmcrAne|BmcrRan;
  14.159-		mii->miw(mii, phyno, Bmcr, r);
  14.160-	}
  14.161-
  14.162-	return 0;
  14.163-}
  14.164-
  14.165-int
  14.166-miistatus(Mii* mii)
  14.167-{
  14.168-	MiiPhy *phy;
  14.169-	int anlpar, bmsr, p, r, phyno;
  14.170-
  14.171-	if(mii == nil || mii->ctlr == nil || mii->curphy == nil)
  14.172-		return -1;
  14.173-	phy = mii->curphy;
  14.174-	phyno = phy->phyno;
  14.175-
  14.176-	/*
  14.177-	 * Check Auto-Negotiation is complete and link is up.
  14.178-	 * (Read status twice as the Ls bit is sticky).
  14.179-	 */
  14.180-	bmsr = mii->mir(mii, phyno, Bmsr);
  14.181-	if(!(bmsr & (BmsrAnc|BmsrAna))) {
  14.182-		// print("miistatus: auto-neg incomplete\n");
  14.183-		return -1;
  14.184-	}
  14.185-
  14.186-	bmsr = mii->mir(mii, phyno, Bmsr);
  14.187-	if(!(bmsr & BmsrLs)){
  14.188-		// print("miistatus: link down\n");
  14.189-		phy->link = 0;
  14.190-		return -1;
  14.191-	}
  14.192-
  14.193-	phy->speed = phy->fd = phy->rfc = phy->tfc = 0;
  14.194-	if(phy->mscr){
  14.195-		r = mii->mir(mii, phyno, Mssr);
  14.196-		if((phy->mscr & Mscr1000TFD) && (r & Mssr1000TFD)){
  14.197-			phy->speed = 1000;
  14.198-			phy->fd = 1;
  14.199-		}
  14.200-		else if((phy->mscr & Mscr1000THD) && (r & Mssr1000THD))
  14.201-			phy->speed = 1000;
  14.202-	}
  14.203-
  14.204-	anlpar = mii->mir(mii, phyno, Anlpar);
  14.205-	if(phy->speed == 0){
  14.206-		r = phy->anar & anlpar;
  14.207-		if(r & AnaTXFD){
  14.208-			phy->speed = 100;
  14.209-			phy->fd = 1;
  14.210-		}
  14.211-		else if(r & AnaTXHD)
  14.212-			phy->speed = 100;
  14.213-		else if(r & Ana10FD){
  14.214-			phy->speed = 10;
  14.215-			phy->fd = 1;
  14.216-		}
  14.217-		else if(r & Ana10HD)
  14.218-			phy->speed = 10;
  14.219-	}
  14.220-	if(phy->speed == 0) {
  14.221-		// print("miistatus: phy speed 0\n");
  14.222-		return -1;
  14.223-	}
  14.224-
  14.225-	if(phy->fd){
  14.226-		p = phy->fc;
  14.227-		r = anlpar & (AnaAP|AnaP);
  14.228-		if(p == AnaAP && r == (AnaAP|AnaP))
  14.229-			phy->tfc = 1;
  14.230-		else if(p == (AnaAP|AnaP) && r == AnaAP)
  14.231-			phy->rfc = 1;
  14.232-		else if((p & AnaP) && (r & AnaP))
  14.233-			phy->rfc = phy->tfc = 1;
  14.234-	}
  14.235-
  14.236-	phy->link = 1;
  14.237-
  14.238-	return 0;
  14.239-}
    15.1deleted file mode 100644
    15.2--- a/sys/src/9/teg2/ethermii.h
    15.3+++ /dev/null
    15.4@@ -1,116 +0,0 @@
    15.5-typedef struct Mii Mii;
    15.6-typedef struct MiiPhy MiiPhy;
    15.7-
    15.8-enum {					/* registers */
    15.9-	Bmcr		= 0x00,		/* Basic Mode Control */
   15.10-	Bmsr		= 0x01,		/* Basic Mode Status */
   15.11-	Phyidr1		= 0x02,		/* PHY Identifier #1 */
   15.12-	Phyidr2		= 0x03,		/* PHY Identifier #2 */
   15.13-	Anar		= 0x04,		/* Auto-Negotiation Advertisement */
   15.14-	Anlpar		= 0x05,		/* AN Link Partner Ability */
   15.15-	Aner		= 0x06,		/* AN Expansion */
   15.16-	Annptr		= 0x07,		/* AN Next Page TX */
   15.17-	Annprr		= 0x08,		/* AN Next Page RX */
   15.18-	Mscr		= 0x09,		/* MASTER-SLAVE Control */
   15.19-	Mssr		= 0x0A,		/* MASTER-SLAVE Status */
   15.20-	Esr		= 0x0F,		/* Extended Status */
   15.21-
   15.22-	NMiiPhyr	= 32,
   15.23-	NMiiPhy		= 32,
   15.24-};
   15.25-
   15.26-enum {					/* Bmcr */
   15.27-	BmcrSs1		= 0x0040,	/* Speed Select[1] */
   15.28-	BmcrCte		= 0x0080,	/* Collision Test Enable */
   15.29-	BmcrDm		= 0x0100,	/* Duplex Mode */
   15.30-	BmcrRan		= 0x0200,	/* Restart Auto-Negotiation */
   15.31-	BmcrI		= 0x0400,	/* Isolate */
   15.32-	BmcrPd		= 0x0800,	/* Power Down */
   15.33-	BmcrAne		= 0x1000,	/* Auto-Negotiation Enable */
   15.34-	BmcrSs0		= 0x2000,	/* Speed Select[0] */
   15.35-	BmcrLe		= 0x4000,	/* Loopback Enable */
   15.36-	BmcrR		= 0x8000,	/* Reset */
   15.37-};
   15.38-
   15.39-enum {					/* Bmsr */
   15.40-	BmsrEc		= 0x0001,	/* Extended Capability */
   15.41-	BmsrJd		= 0x0002,	/* Jabber Detect */
   15.42-	BmsrLs		= 0x0004,	/* Link Status */
   15.43-	BmsrAna		= 0x0008,	/* Auto-Negotiation Ability */
   15.44-	BmsrRf		= 0x0010,	/* Remote Fault */
   15.45-	BmsrAnc		= 0x0020,	/* Auto-Negotiation Complete */
   15.46-	BmsrPs		= 0x0040,	/* Preamble Suppression Capable */
   15.47-	BmsrEs		= 0x0100,	/* Extended Status */
   15.48-	Bmsr100T2HD	= 0x0200,	/* 100BASE-T2 HD Capable */
   15.49-	Bmsr100T2FD	= 0x0400,	/* 100BASE-T2 FD Capable */
   15.50-	Bmsr10THD	= 0x0800,	/* 10BASE-T HD Capable */
   15.51-	Bmsr10TFD	= 0x1000,	/* 10BASE-T FD Capable */
   15.52-	Bmsr100TXHD	= 0x2000,	/* 100BASE-TX HD Capable */
   15.53-	Bmsr100TXFD	= 0x4000,	/* 100BASE-TX FD Capable */
   15.54-	Bmsr100T4	= 0x8000,	/* 100BASE-T4 Capable */
   15.55-};
   15.56-
   15.57-enum {					/* Anar/Anlpar */
   15.58-	Ana10HD		= 0x0020,	/* Advertise 10BASE-T */
   15.59-	Ana10FD		= 0x0040,	/* Advertise 10BASE-T FD */
   15.60-	AnaTXHD		= 0x0080,	/* Advertise 100BASE-TX */
   15.61-	AnaTXFD		= 0x0100,	/* Advertise 100BASE-TX FD */
   15.62-	AnaT4		= 0x0200,	/* Advertise 100BASE-T4 */
   15.63-	AnaP		= 0x0400,	/* Pause */
   15.64-	AnaAP		= 0x0800,	/* Asymmetrical Pause */
   15.65-	AnaRf		= 0x2000,	/* Remote Fault */
   15.66-	AnaAck		= 0x4000,	/* Acknowledge */
   15.67-	AnaNp		= 0x8000,	/* Next Page Indication */
   15.68-};
   15.69-
   15.70-enum {					/* Mscr */
   15.71-	Mscr1000THD	= 0x0100,	/* Advertise 1000BASE-T HD */
   15.72-	Mscr1000TFD	= 0x0200,	/* Advertise 1000BASE-T FD */
   15.73-};
   15.74-
   15.75-enum {					/* Mssr */
   15.76-	Mssr1000THD	= 0x0400,	/* Link Partner 1000BASE-T HD able */
   15.77-	Mssr1000TFD	= 0x0800,	/* Link Partner 1000BASE-T FD able */
   15.78-};
   15.79-
   15.80-enum {					/* Esr */
   15.81-	Esr1000THD	= 0x1000,	/* 1000BASE-T HD Capable */
   15.82-	Esr1000TFD	= 0x2000,	/* 1000BASE-T FD Capable */
   15.83-	Esr1000XHD	= 0x4000,	/* 1000BASE-X HD Capable */
   15.84-	Esr1000XFD	= 0x8000,	/* 1000BASE-X FD Capable */
   15.85-};
   15.86-
   15.87-typedef struct Mii {
   15.88-	Lock;
   15.89-	int	nphy;
   15.90-	int	mask;
   15.91-	MiiPhy*	phy[NMiiPhy];
   15.92-	MiiPhy*	curphy;
   15.93-
   15.94-	void*	ctlr;
   15.95-	int	(*mir)(Mii*, int, int);
   15.96-	int	(*miw)(Mii*, int, int, int);
   15.97-} Mii;
   15.98-
   15.99-typedef struct MiiPhy {
  15.100-	Mii*	mii;
  15.101-	int	oui;
  15.102-	int	phyno;
  15.103-
  15.104-	int	anar;
  15.105-	int	fc;
  15.106-	int	mscr;
  15.107-
  15.108-	int	link;
  15.109-	int	speed;
  15.110-	int	fd;
  15.111-	int	rfc;
  15.112-	int	tfc;
  15.113-};
  15.114-
  15.115-extern int mii(Mii*, int);
  15.116-extern int miiane(Mii*, int, int, int);
  15.117-extern int miimir(Mii*, int);
  15.118-extern int miimiw(Mii*, int, int);
  15.119-extern int miireset(Mii*);
  15.120-extern int miistatus(Mii*);