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Mercurial > hg > plan9front / changeset: 7l: there is no BIC* $bimm variant

changeset 7174: 3839b70da66a
parent 7173: 0f6e130b3c07
child 7175: 8867b8f3fb3e
author: cinap_lenrek@felloff.net
date: Mon, 22 Apr 2019 03:05:51 +0200
files: sys/src/cmd/7l/asmout.c sys/src/cmd/7l/optab.c
description: 7l: there is no BIC* $bimm variant
     1.1--- a/sys/src/cmd/7l/asmout.c
     1.2+++ b/sys/src/cmd/7l/asmout.c
     1.3@@ -708,7 +708,7 @@ asmout(Prog *p, Optab *o)
     1.4 		o1 |= (p->from.offset&0x7F)<<5;
     1.5 		break;
     1.6 
     1.7-	case 53:	/* and/or/eor/bic/... $bimmN, Rn, Rd -> op (N,r,s), Rn, Rd */
     1.8+	case 53:	/* and/or/eor... $bimmN, Rn, Rd -> op (N,r,s), Rn, Rd */
     1.9 		as = p->as;
    1.10 		rt = p->to.reg;
    1.11 		r = p->reg;
    1.12@@ -1169,7 +1169,7 @@ opirr(int a)
    1.13 	case ASUBSW:	return S32 | 1<<30 | 1<<29 | 0x11<<24;
    1.14 
    1.15 	/* op $imm(SB), Rd; op label, Rd */
    1.16-	case AADR:		return 0<<31 | 0x10<<24;
    1.17+	case AADR:	return 0<<31 | 0x10<<24;
    1.18 	case AADRP:	return 1<<31 | 0x10<<24;
    1.19 
    1.20 	/* op $bimm, Rn, Rd */
    1.21@@ -1235,7 +1235,7 @@ opirr(int a)
    1.22 
    1.23 	case ADSB:	return SYSOP(0,0,3,3,0,4,0x1F);
    1.24 	case ADMB:	return SYSOP(0,0,3,3,0,5,0x1F);
    1.25-	case AISB:		return SYSOP(0,0,3,3,0,6,0x1F);
    1.26+	case AISB:	return SYSOP(0,0,3,3,0,6,0x1F);
    1.27 	case AHINT:	return SYSOP(0,0,3,2,0,0,0x1F);
    1.28 
    1.29 	}
     2.1--- a/sys/src/cmd/7l/optab.c
     2.2+++ b/sys/src/cmd/7l/optab.c
     2.3@@ -54,10 +54,6 @@ Optab	optab[] =
     2.4 	{ AANDW,	C_BITCON32,C_REG,C_REG,		53, 4, 0 },
     2.5 	{ AAND,		C_BITCON64,C_NONE,C_REG,	53, 4, 0 },
     2.6 	{ AANDW,	C_BITCON32,C_NONE,C_REG,	53, 4, 0 },
     2.7-	{ ABIC,		C_BITCON64,C_REG,C_REG,		53, 4, 0 },
     2.8-	{ ABICW,	C_BITCON32,C_REG,C_REG,		53, 4, 0 },
     2.9-	{ ABIC,		C_BITCON64,C_NONE,C_REG,	53, 4, 0 },
    2.10-	{ ABICW,	C_BITCON32,C_NONE,C_REG,	53, 4, 0 },
    2.11 
    2.12 	{ AAND,		C_LCON,	C_REG,	C_REG,		28, 8, 0,	LFROM },
    2.13 	{ AANDW,	C_LCON,	C_REG,	C_REG,		28, 8, 0,	LFROM },