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Mercurial > hg > plan9front / changeset: bcm, bcm64: make irq.$O optional and add intrdisable(), use intrenable()

changeset 7312: 4dbf2522f668
parent 7311: 686cdda01118
child 7313: db3e8d004b27
author: cinap_lenrek@felloff.net
date: Thu, 25 Jul 2019 08:58:58 +0200
files: sys/src/9/bcm/clock.c sys/src/9/bcm/devgpio.c sys/src/9/bcm/emmc.c sys/src/9/bcm/fns.h sys/src/9/bcm/irq.c sys/src/9/bcm/mem.h sys/src/9/bcm/mkfile sys/src/9/bcm/pi sys/src/9/bcm/pi2 sys/src/9/bcm/uartmini.c sys/src/9/bcm/uartpl011.c sys/src/9/bcm/usbdwc.c sys/src/9/bcm64/clock.c sys/src/9/bcm64/fns.h sys/src/9/bcm64/mkfile sys/src/9/bcm64/pi3
description: bcm, bcm64: make irq.$O optional and add intrdisable(), use intrenable()

the raspberry pi 4 has a new interrupt controller and
pci support, so get rid of intrenable() macro and
properly make intrenable function with tbdf argument.
     1.1--- a/sys/src/9/bcm/clock.c
     1.2+++ b/sys/src/9/bcm/clock.c
     1.3@@ -128,7 +128,7 @@ clockinit(void)
     1.4 			*(ulong*)(ARMLOCAL + Prescaler) = (((uvlong)SystimerFreq<<31)/19200000)&~1UL;
     1.5 		} else {
     1.6 			cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysctl, Enable);
     1.7-			intrenable(IRQcntpns, localclockintr, nil, 0, "clock");
     1.8+			intrenable(IRQcntpns, localclockintr, nil, BUSUNKNOWN, "clock");
     1.9 		}
    1.10 	}
    1.11 
    1.12@@ -148,7 +148,7 @@ clockinit(void)
    1.13 
    1.14 	if(m->machno == 0){
    1.15 		tn->c3 = tn->clo - 1;
    1.16-		intrenable(IRQtimer3, clockintr, nil, 0, "clock");
    1.17+		intrenable(IRQtimer3, clockintr, nil, BUSUNKNOWN, "clock");
    1.18 
    1.19 		tm = (Armtimer*)ARMTIMER;
    1.20 		tm->load = 0;
     2.1--- a/sys/src/9/bcm/devgpio.c
     2.2+++ b/sys/src/9/bcm/devgpio.c
     2.3@@ -336,7 +336,7 @@ gpioinit(void)
     2.4 	gpiomeminit();
     2.5 	boardrev = getboardrev() & 0xff;
     2.6 	pinscheme = Qboard;
     2.7-	intrenable(49, interrupt, nil, 0, "gpio1");
     2.8+	intrenable(49, interrupt, nil, BUSUNKNOWN, "gpio1");
     2.9 }
    2.10 
    2.11 static void
     3.1--- a/sys/src/9/bcm/emmc.c
     3.2+++ b/sys/src/9/bcm/emmc.c
     3.3@@ -236,7 +236,7 @@ emmcenable(void)
     3.4 	if(i == 1000)
     3.5 		print("SD clock won't initialise!\n");
     3.6 	WR(Irptmask, ~(Dtoerr|Cardintr));
     3.7-	intrenable(IRQmmc, mmcinterrupt, nil, 0, "mmc");
     3.8+	intrenable(IRQmmc, mmcinterrupt, nil, BUSUNKNOWN, "mmc");
     3.9 }
    3.10 
    3.11 static int
    3.12@@ -398,8 +398,6 @@ emmcio(int write, uchar *buf, int len)
    3.13 	}
    3.14 	if(i)
    3.15 		WR(Interrupt, i);
    3.16-	if(!write)
    3.17-		cachedinvse(buf, len);
    3.18 	poperror();
    3.19 	okay(0);
    3.20 }
     4.1--- a/sys/src/9/bcm/fns.h
     4.2+++ b/sys/src/9/bcm/fns.h
     4.3@@ -61,8 +61,8 @@ extern int gpiogetevent(uint);
     4.4 extern void gpiomeminit(void);
     4.5 extern u32int ifsrget(void);
     4.6 extern void intrcpushutdown(void);
     4.7-extern void irqenable(int, void (*)(Ureg*, void*), void*);
     4.8-#define intrenable(i, f, a, b, n) irqenable((i), (f), (a))
     4.9+extern void intrenable(int, void (*)(Ureg*, void*), void*, int, char*);
    4.10+extern void intrdisable(int, void (*)(Ureg*, void*), void*, int, char*);
    4.11 extern void intrsoff(void);
    4.12 extern int isaconfig(char*, int, ISAConf*);
    4.13 extern void l2cacheuwbinv(void);
     5.1--- a/sys/src/9/bcm/irq.c
     5.2+++ b/sys/src/9/bcm/irq.c
     5.3@@ -114,7 +114,7 @@ fiq(Ureg *ureg)
     5.4 }
     5.5 
     5.6 void
     5.7-irqenable(int irq, void (*f)(Ureg*, void*), void* a)
     5.8+intrenable(int irq, void (*f)(Ureg*, void*), void* a, int, char*)
     5.9 {
    5.10 	Vctl *v;
    5.11 	Intregs *ip;
    5.12@@ -165,3 +165,8 @@ irqenable(int irq, void (*f)(Ureg*, void
    5.13 	}
    5.14 	unlock(&vctllock);
    5.15 }
    5.16+
    5.17+void
    5.18+intrdisable(int, void (*)(Ureg*, void*), void*, int, char*)
    5.19+{
    5.20+}
     6.1--- a/sys/src/9/bcm/mem.h
     6.2+++ b/sys/src/9/bcm/mem.h
     6.3@@ -10,9 +10,7 @@
     6.4  */
     6.5 #define	BY2PG		(4*KiB)			/* bytes per page */
     6.6 #define	PGSHIFT		12			/* log(BY2PG) */
     6.7-#define	HOWMANY(x,y)	(((x)+((y)-1))/(y))
     6.8-#define	ROUNDUP(x,y)	(HOWMANY((x),(y))*(y))
     6.9-#define	PGROUND(s)	ROUNDUP(s, BY2PG)
    6.10+#define	PGROUND(s)	ROUND(s, BY2PG)
    6.11 #define	ROUND(s, sz)	(((s)+(sz-1))&~(sz-1))
    6.12 
    6.13 #define	MAXMACH		4			/* max # cpus system can run */
    6.14@@ -51,8 +49,8 @@
    6.15 #define	FIQSTKTOP	(KZERO+0x4000)		/* FIQ stack */
    6.16 #define	L1		(KZERO+0x4000)		/* tt ptes: 16KiB aligned */
    6.17 #define	KTZERO		(KZERO+0x8000)		/* kernel text start */
    6.18-#define VIRTIO		0x7E000000		/* i/o registers */
    6.19-#define	ARMLOCAL	(VIRTIO+IOSIZE)		/* armv7 only */
    6.20+#define VIRTIO		(0x7E000000)		/* i/o registers */
    6.21+#define	ARMLOCAL	(0x7F000000)		/* armv7 only */
    6.22 #define	VGPIO		(ARMLOCAL+MiB)		/* virtual gpio for pi3 ACT LED */
    6.23 #define	FRAMEBUFFER	0xC0000000		/* video framebuffer */
    6.24 
    6.25@@ -95,7 +93,6 @@
    6.26  *	BUS  addresses as seen from the videocore gpu.
    6.27  */
    6.28 #define	PHYSDRAM	0
    6.29-#define	IOSIZE		(16*MiB)
    6.30 
    6.31 #define MIN(a, b)	((a) < (b)? (a): (b))
    6.32 #define MAX(a, b)	((a) > (b)? (a): (b))
     7.1--- a/sys/src/9/bcm/mkfile
     7.2+++ b/sys/src/9/bcm/mkfile
     7.3@@ -50,7 +50,6 @@ OBJ=\
     7.4 	fpi.$O\
     7.5 	fpiarm.$O\
     7.6 	fpimem.$O\
     7.7-	irq.$O\
     7.8 	main.$O\
     7.9 	mmu.$O\
    7.10 	random.$O\
     8.1--- a/sys/src/9/bcm/pi
     8.2+++ b/sys/src/9/bcm/pi
     8.3@@ -43,6 +43,7 @@ misc
     8.4 	dma
     8.5 	vcore
     8.6 	vfp3	coproc
     8.7+	irq
     8.8 
     8.9 port
    8.10 	int cpuserver = 0;
     9.1--- a/sys/src/9/bcm/pi2
     9.2+++ b/sys/src/9/bcm/pi2
     9.3@@ -43,6 +43,7 @@ misc
     9.4 	dma
     9.5 	vcore
     9.6 	vfp3	coproc
     9.7+	irq
     9.8 
     9.9 port
    9.10 	int cpuserver = 0;
    10.1--- a/sys/src/9/bcm/uartmini.c
    10.2+++ b/sys/src/9/bcm/uartmini.c
    10.3@@ -100,7 +100,7 @@ enable(Uart *uart, int ie)
    10.4 	ap[MuCntl] = TxEn|RxEn;
    10.5 	baud(uart, uart->baud);
    10.6 	if(ie){
    10.7-		intrenable(IRQaux, interrupt, uart, 0, uart->name);
    10.8+		intrenable(IRQaux, interrupt, uart, BUSUNKNOWN, uart->name);
    10.9 		ap[MuIer] = RxIen|TxIen;
   10.10 	}else
   10.11 		ap[MuIer] = 0;
    11.1--- a/sys/src/9/bcm/uartpl011.c
    11.2+++ b/sys/src/9/bcm/uartpl011.c
    11.3@@ -148,7 +148,7 @@ enable(Uart *uart, int ie)
    11.4 
    11.5 	disable(uart);
    11.6 	if(ie){
    11.7-		intrenable(IRQuart, interrupt, uart, 0, uart->name);
    11.8+		intrenable(IRQuart, interrupt, uart, BUSUNKNOWN, uart->name);
    11.9 		reg[IMSC] = TXIM|RXIM;
   11.10 	}
   11.11 	uarton(uart);
    12.1--- a/sys/src/9/bcm/usbdwc.c
    12.2+++ b/sys/src/9/bcm/usbdwc.c
    12.3@@ -85,6 +85,8 @@ static void dumpctlr(Ctlr *ctlr);
    12.4 static void dumphchan(Ctlr *ctlr, Hostchan *hc);
    12.5 static void dump(Hci *hp);
    12.6 
    12.7+#define	HOWMANY(x, y)	(((x)+((y)-1))/(y))
    12.8+
    12.9 static void
   12.10 filock(Lock *l)
   12.11 {
   12.12@@ -1051,7 +1053,7 @@ reset(Hci *hp)
   12.13 		return -1;
   12.14 	dprint("usbdwc: rev %d.%3.3x\n", (id>>12)&0xF, id&0xFFF);
   12.15 
   12.16-	intrenable(IRQtimerArm, irqintr, ctlr, 0, "dwc");
   12.17+	intrenable(IRQtimerArm, irqintr, ctlr, BUSUNKNOWN, "dwc");
   12.18 
   12.19 	hp->aux = ctlr;
   12.20 	hp->port = 0;
   12.21@@ -1075,7 +1077,7 @@ reset(Hci *hp)
   12.22 	hp->debug = setdebug;
   12.23 	hp->type = "dwcotg";
   12.24 
   12.25-	intrenable(hp->irq, hp->interrupt, hp, UNKNOWN, "usbdwcotg");
   12.26+	intrenable(hp->irq, hp->interrupt, hp, BUSUNKNOWN, "usbdwcotg");
   12.27 
   12.28 	return 0;
   12.29 }
    13.1--- a/sys/src/9/bcm64/clock.c
    13.2+++ b/sys/src/9/bcm64/clock.c
    13.3@@ -131,7 +131,7 @@ clockinit(void)
    13.4 		*(u32int*)(ARMLOCAL + Prescaler) = (((uvlong)SystimerFreq<<31)/19200000)&~1UL;
    13.5 	} else {
    13.6 		syswr(CNTP_CTL_EL0, Enable);
    13.7-		intrenable(IRQcntpns, localclockintr, nil, 0, "clock");
    13.8+		intrenable(IRQcntpns, localclockintr, nil, BUSUNKNOWN, "clock");
    13.9 	}
   13.10 
   13.11 	tn = (Systimers*)SYSTIMERS;
   13.12@@ -151,7 +151,7 @@ clockinit(void)
   13.13 	if(m->machno == 0){
   13.14 		tn->cs = 1<<3;
   13.15 		tn->c3 = tn->clo - 1;
   13.16-		intrenable(IRQtimer3, clockintr, nil, 0, "clock");
   13.17+		intrenable(IRQtimer3, clockintr, nil, BUSUNKNOWN, "clock");
   13.18 
   13.19 		tm = (Armtimer*)ARMTIMER;
   13.20 		tm->load = 0;
    14.1--- a/sys/src/9/bcm64/fns.h
    14.2+++ b/sys/src/9/bcm64/fns.h
    14.3@@ -110,8 +110,8 @@ extern void dumpregs(Ureg*);
    14.4 /* irq */
    14.5 extern void intrcpushutdown(void);
    14.6 extern void intrsoff(void);
    14.7-#define intrenable(i, f, a, b, n)	irqenable((i), (f), (a))
    14.8-extern void irqenable(int, void (*)(Ureg*, void*), void*);
    14.9+extern void intrenable(int, void (*)(Ureg*, void*), void*, int, char*);
   14.10+extern void intrdisable(int, void (*)(Ureg*, void*), void*, int, char*);
   14.11 extern int irq(Ureg*);
   14.12 extern void fiq(Ureg*);
   14.13 
    15.1--- a/sys/src/9/bcm64/mkfile
    15.2+++ b/sys/src/9/bcm64/mkfile
    15.3@@ -44,7 +44,6 @@ OBJ=\
    15.4 	bootargs.$O\
    15.5 	clock.$O\
    15.6 	fpu.$O\
    15.7-	irq.$O\
    15.8 	main.$O\
    15.9 	mmu.$O\
   15.10 	sysreg.$O\
    16.1--- a/sys/src/9/bcm64/pi3
    16.2+++ b/sys/src/9/bcm64/pi3
    16.3@@ -43,6 +43,7 @@ misc
    16.4 	sdmmc	emmc
    16.5 	dma
    16.6 	vcore
    16.7+	irq
    16.8 
    16.9 	dtracysys
   16.10 	dtracytimer