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Mercurial > hg > plan9front / changeset: igfx: cursor/plane pipe assign is G45 only, add magic dsp a toggle from enable sequence

changeset 4211: baf2e50c3353
parent 4210: 6352701cf761
child 4212: 879ef1aac380
author: cinap_lenrek@felloff.net
date: Tue, 13 Jan 2015 18:04:33 +0100
files: sys/src/cmd/aux/vga/igfx.c
description: igfx: cursor/plane pipe assign is G45 only, add magic dsp a toggle from enable sequence
     1.1--- a/sys/src/cmd/aux/vga/igfx.c
     1.2+++ b/sys/src/cmd/aux/vga/igfx.c
     1.3@@ -815,6 +815,8 @@ init(Vga* vga, Ctlr* ctlr)
     1.4 
     1.5 	/* plane enable, 32bpp */
     1.6 	p->dsp->cntr.v = (1<<31) | (6<<26);
     1.7+	if(igfx->type == TypeG45)
     1.8+		p->dsp->cntr.v |= x<<24;	/* pipe assign */
     1.9 
    1.10 	/* stride must be 64 byte aligned */
    1.11 	p->dsp->stride.v = m->x * (m->z / 8);
    1.12@@ -829,7 +831,9 @@ init(Vga* vga, Ctlr* ctlr)
    1.13 	p->dsp->tileoff.v = 0;
    1.14 
    1.15 	/* cursor plane off */
    1.16-	p->cur->cntr.v = x<<28;
    1.17+	p->cur->cntr.v = 0;
    1.18+	if(igfx->type == TypeG45)
    1.19+		p->cur->cntr.v |= x<<28;	/* pipe assign */
    1.20 	p->cur->pos.v = 0;
    1.21 	p->cur->base.v = 0;
    1.22 
    1.23@@ -999,10 +1003,10 @@ disablepipe(Igfx *igfx, int x)
    1.24 
    1.25 	/* planes off */
    1.26 	csr(igfx, p->dsp->cntr.a, 1<<31, 0);
    1.27-	csr(igfx, p->dsp->surf.a, ~0, 0);	/* arm */
    1.28+	wr(igfx, p->dsp->surf.a, 0);	/* arm */
    1.29 	/* cursor off */
    1.30 	csr(igfx, p->cur->cntr.a, 1<<5 | 7, 0);
    1.31-	csr(igfx, p->cur->base.a, ~0, 0);	/* arm */
    1.32+	wr(igfx, p->cur->base.a, 0);	/* arm */
    1.33 
    1.34 	/* display/overlay/cursor planes off */
    1.35 	if(igfx->type == TypeG45)
    1.36@@ -1064,6 +1068,16 @@ load(Vga* vga, Ctlr* ctlr)
    1.37 	for(x = 0; x < igfx->npipe; x++)
    1.38 		disablepipe(igfx, x);
    1.39 
    1.40+	if(igfx->type == TypeG45){
    1.41+		/* toggle dsp a on and off (from enable sequence) */
    1.42+		csr(igfx, igfx->pipe[0].conf.a, 3<<18, 0);
    1.43+		csr(igfx, igfx->pipe[0].dsp->cntr.a, 0, 1<<31);
    1.44+		wr(igfx, igfx->pipe[0].dsp->surf.a, 0);		/* arm */
    1.45+		csr(igfx, igfx->pipe[0].dsp->cntr.a, 1<<31, 0);
    1.46+		wr(igfx, igfx->pipe[0].dsp->surf.a, 0);		/* arm */
    1.47+		csr(igfx, igfx->pipe[0].conf.a, 0, 3<<18);
    1.48+	}
    1.49+
    1.50 	/* program new clock sources */
    1.51 	loadreg(igfx, igfx->rawclkfreq);
    1.52 	loadreg(igfx, igfx->drefctl);