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Mercurial > hg > plan9front / changeset: bcm: simplify irq handling by having per cpu Vctl chain

changeset 6869: 194ab9426a0c
parent 6868: 3a2e3a97af40
child 6870: 338996d96b6a
author: cinap_lenrek@felloff.net
date: Wed, 07 Nov 2018 16:49:50 +0100
files: sys/src/9/bcm/trap.c
description: bcm: simplify irq handling by having per cpu Vctl chain
     1.1--- a/sys/src/9/bcm/trap.c
     1.2+++ b/sys/src/9/bcm/trap.c
     1.3@@ -13,7 +13,6 @@
     1.4 #include "arm.h"
     1.5 
     1.6 #define INTREGS		(VIRTIO+0xB200)
     1.7-#define	LOCALREGS	(VIRTIO+IOSIZE)
     1.8 
     1.9 typedef struct Intregs Intregs;
    1.10 typedef struct Vctl Vctl;
    1.11@@ -51,7 +50,6 @@ struct Intregs {
    1.12 struct Vctl {
    1.13 	Vctl	*next;
    1.14 	int	irq;
    1.15-	int	cpu;
    1.16 	u32int	*reg;
    1.17 	u32int	mask;
    1.18 	void	(*f)(Ureg*, void*);
    1.19@@ -59,7 +57,7 @@ struct Vctl {
    1.20 };
    1.21 
    1.22 static Lock vctllock;
    1.23-static Vctl *vctl, *vfiq;
    1.24+static Vctl *vctl[MAXMACH], *vfiq;
    1.25 
    1.26 static char *trapnames[PsrMask+1] = {
    1.27 	[ PsrMusr ] "user mode",
    1.28@@ -82,6 +80,7 @@ trapinit(void)
    1.29 {
    1.30 	Vpage0 *vpage0;
    1.31 
    1.32+	intrcpushutdown();
    1.33 	if (m->machno == 0) {
    1.34 		/* disable everything */
    1.35 		intrsoff();
    1.36@@ -110,10 +109,10 @@ intrcpushutdown(void)
    1.37 
    1.38 	if(soc.armlocal == 0)
    1.39 		return;
    1.40-	enable = (u32int*)(LOCALREGS + Localtimerint) + m->machno;
    1.41+	enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
    1.42 	*enable = 0;
    1.43 	if(m->machno){
    1.44-		enable = (u32int*)(LOCALREGS + Localmboxint) + m->machno;
    1.45+		enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
    1.46 		*enable = 1;
    1.47 	}
    1.48 }
    1.49@@ -143,8 +142,8 @@ irq(Ureg* ureg)
    1.50 	int clockintr;
    1.51 
    1.52 	clockintr = 0;
    1.53-	for(v = vctl; v; v = v->next)
    1.54-		if(v->cpu == m->machno && (*v->reg & v->mask) != 0){
    1.55+	for(v = vctl[m->machno]; v != nil; v = v->next)
    1.56+		if((*v->reg & v->mask) != 0){
    1.57 			coherence();
    1.58 			v->f(ureg, v->a);
    1.59 			coherence();
    1.60@@ -180,19 +179,16 @@ irqenable(int irq, void (*f)(Ureg*, void
    1.61 	u32int *enable;
    1.62 
    1.63 	ip = (Intregs*)INTREGS;
    1.64-	v = (Vctl*)malloc(sizeof(Vctl));
    1.65-	if(v == nil)
    1.66+	if((v = xalloc(sizeof(Vctl))) == nil)
    1.67 		panic("irqenable: no mem");
    1.68 	v->irq = irq;
    1.69-	v->cpu = 0;
    1.70 	if(irq >= IRQlocal){
    1.71-		v->reg = (u32int*)(LOCALREGS + Localintpending) + m->machno;
    1.72+		v->reg = (u32int*)(ARMLOCAL + Localintpending) + m->machno;
    1.73 		if(irq >= IRQmbox0)
    1.74-			enable = (u32int*)(LOCALREGS + Localmboxint) + m->machno;
    1.75+			enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
    1.76 		else
    1.77-			enable = (u32int*)(LOCALREGS + Localtimerint) + m->machno;
    1.78+			enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
    1.79 		v->mask = 1 << (irq - IRQlocal);
    1.80-		v->cpu = m->machno;
    1.81 	}else if(irq >= IRQbasic){
    1.82 		enable = &ip->ARMenable;
    1.83 		v->reg = &ip->ARMpending;
    1.84@@ -211,8 +207,8 @@ irqenable(int irq, void (*f)(Ureg*, void
    1.85 		vfiq = v;
    1.86 		ip->FIQctl = Fiqenable | irq;
    1.87 	}else{
    1.88-		v->next = vctl;
    1.89-		vctl = v;
    1.90+		v->next = vctl[m->machno];
    1.91+		vctl[m->machno] = v;
    1.92 		if(irq >= IRQmbox0){
    1.93 			if(irq <= IRQmbox3)
    1.94 				*enable |= 1 << (irq - IRQmbox0);