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Mercurial > hg > plan9front / changeset: merge

changeset 7156: 9851d8234792
parent 7149: b3130231b2b7
parent 7155: 85c4b38d9a82
child 7157: 01744491ac8f
author: cinap_lenrek@felloff.net
date: Thu, 11 Apr 2019 13:54:03 +0200
files:
description: merge
     1.1--- a/sys/src/9/bcm/arch.c
     1.2+++ b/sys/src/9/bcm/arch.c
     1.3@@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
     1.4 {
     1.5 	ureg->pc = p->sched.pc;
     1.6 	ureg->sp = p->sched.sp+4;
     1.7-	ureg->r14 = PTR2UINT(sched);
     1.8+	ureg->r14 = (uintptr)sched;
     1.9 }
    1.10 
    1.11 /*
    1.12@@ -95,8 +95,8 @@ linkproc(void)
    1.13 void
    1.14 kprocchild(Proc *p, void (*func)(void*), void *arg)
    1.15 {
    1.16-	p->sched.pc = PTR2UINT(linkproc);
    1.17-	p->sched.sp = PTR2UINT(p->kstack+KSTACK);
    1.18+	p->sched.pc = (uintptr)linkproc;
    1.19+	p->sched.sp = (uintptr)p->kstack+KSTACK;
    1.20 
    1.21 	p->kpfun = func;
    1.22 	p->kparg = arg;
     2.1--- a/sys/src/9/bcm/devarch.c
     2.2+++ b/sys/src/9/bcm/devarch.c
     2.3@@ -172,3 +172,59 @@ archinit(void)
     2.4 	addarchfile("cputype", 0444, cputyperead, nil);
     2.5 	addarchfile("cputemp", 0444, cputempread, nil);
     2.6 }
     2.7+
     2.8+void
     2.9+uartconsinit(void)
    2.10+{
    2.11+	extern PhysUart *physuart[];
    2.12+	char *p, *cmd;
    2.13+	Uart *uart;
    2.14+	int i, n;
    2.15+
    2.16+	if((p = getconf("console")) == nil)
    2.17+		return;
    2.18+	i = strtoul(p, &cmd, 0);
    2.19+	if(p == cmd)
    2.20+		return;
    2.21+	/* we only have two possible uarts, the pl011 and aux */
    2.22+	for(n = 0; physuart[n] != nil; n++)
    2.23+		;
    2.24+	if(i < 0 || i >= n)
    2.25+		return;
    2.26+	uart = physuart[i]->pnp();
    2.27+	if(!uart->enabled)
    2.28+		(*uart->phys->enable)(uart, 0);
    2.29+	uartctl(uart, "l8 pn s1");
    2.30+	if(*cmd != '\0')
    2.31+		uartctl(uart, cmd);
    2.32+	consuart = uart;
    2.33+	uart->console = 1;
    2.34+}
    2.35+
    2.36+void
    2.37+okay(int on)
    2.38+{
    2.39+	static int first;
    2.40+	static int okled, polarity;
    2.41+	char *p;
    2.42+
    2.43+	if(!first++){
    2.44+		p = getconf("bcm2709.disk_led_gpio");
    2.45+		if(p == nil)
    2.46+			p = getconf("bcm2708.disk_led_gpio");
    2.47+		if(p != nil)
    2.48+			okled = strtol(p, 0, 0);
    2.49+		else
    2.50+			okled = 'v';
    2.51+		p = getconf("bcm2709.disk_led_active_low");
    2.52+		if(p == nil)
    2.53+			p = getconf("bcm2708.disk_led_active_low");
    2.54+		polarity = (p == nil || *p == '1');
    2.55+		if(okled != 'v')
    2.56+			gpiosel(okled, Output);
    2.57+	}
    2.58+	if(okled == 'v')
    2.59+		vgpset(0, on);
    2.60+	else if(okled != 0)
    2.61+		gpioout(okled, on^polarity);
    2.62+}
     3.1--- a/sys/src/9/bcm/dma.c
     3.2+++ b/sys/src/9/bcm/dma.c
     3.3@@ -100,13 +100,13 @@ static u32int *dmaregs = (u32int*)DMAREG
     3.4 uintptr
     3.5 dmaaddr(void *va)
     3.6 {
     3.7-	return soc.busdram | (PTR2UINT(va) & ~KSEGM);
     3.8+	return soc.busdram | (PADDR(va) - PHYSDRAM);
     3.9 }
    3.10 
    3.11 static uintptr
    3.12 dmaioaddr(void *va)
    3.13 {
    3.14-	return soc.busio | (PTR2UINT(va) & ~VIRTIO);
    3.15+	return soc.busio | ((uintptr)va - VIRTIO);
    3.16 }
    3.17 
    3.18 static void
     4.1--- a/sys/src/9/bcm/fns.h
     4.2+++ b/sys/src/9/bcm/fns.h
     4.3@@ -131,14 +131,9 @@ extern void kexit(Ureg*);
     4.4 #define	kmapinval()
     4.5 #define countpagerefs(a, b)
     4.6 
     4.7-#define PTR2UINT(p)	((uintptr)(p))
     4.8-#define UINT2PTR(i)	((void*)(i))
     4.9-
    4.10 #define	waserror()	(up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
    4.11 
    4.12-#define KADDR(pa)	UINT2PTR(KZERO    | ((uintptr)(pa) & ~KSEGM))
    4.13-#define PADDR(va)	PTR2UINT(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
    4.14-#define DMAADDR(va)	PTR2UINT(BUSDRAM  | ((uintptr)(va) & ~KSEGM))
    4.15-#define DMAIO(va)	PTR2UINT(BUSIO    | ((uintptr)(va) & ~VIRTIO))
    4.16+#define KADDR(pa)	((void*)(KZERO | ((uintptr)(pa) & ~KSEGM)))
    4.17+#define PADDR(va)	(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
    4.18 
    4.19 #define MASK(v)	((1UL << (v)) - 1)	/* mask `v' bits wide */
     5.1--- a/sys/src/9/bcm/io.h
     5.2+++ b/sys/src/9/bcm/io.h
     5.3@@ -11,6 +11,7 @@ enum {
     5.4 	IRQi2c		= 53,
     5.5 	IRQspi		= 54,
     5.6 	IRQsdhost	= 56,
     5.7+	IRQuart		= 57,
     5.8 	IRQmmc		= 62,
     5.9 
    5.10 	IRQbasic	= 64,
     6.1new file mode 100644
     6.2--- /dev/null
     6.3+++ b/sys/src/9/bcm/irq.c
     6.4@@ -0,0 +1,166 @@
     6.5+#include "u.h"
     6.6+#include "../port/lib.h"
     6.7+#include "mem.h"
     6.8+#include "dat.h"
     6.9+#include "fns.h"
    6.10+#include "io.h"
    6.11+#include "ureg.h"
    6.12+#include "../port/error.h"
    6.13+
    6.14+#define INTREGS		(VIRTIO+0xB200)
    6.15+
    6.16+enum {
    6.17+	Fiqenable = 1<<7,
    6.18+
    6.19+	Localtimerint	= 0x40,
    6.20+	Localmboxint	= 0x50,
    6.21+	Localintpending	= 0x60,
    6.22+};
    6.23+
    6.24+/*
    6.25+ * interrupt control registers
    6.26+ */
    6.27+typedef struct Intregs Intregs;
    6.28+struct Intregs {
    6.29+	u32int	ARMpending;
    6.30+	u32int	GPUpending[2];
    6.31+	u32int	FIQctl;
    6.32+	u32int	GPUenable[2];
    6.33+	u32int	ARMenable;
    6.34+	u32int	GPUdisable[2];
    6.35+	u32int	ARMdisable;
    6.36+};
    6.37+
    6.38+typedef struct Vctl Vctl;
    6.39+struct Vctl {
    6.40+	Vctl	*next;
    6.41+	int	irq;
    6.42+	u32int	*reg;
    6.43+	u32int	mask;
    6.44+	void	(*f)(Ureg*, void*);
    6.45+	void	*a;
    6.46+};
    6.47+
    6.48+static Lock vctllock;
    6.49+static Vctl *vctl[MAXMACH], *vfiq;
    6.50+
    6.51+void
    6.52+intrcpushutdown(void)
    6.53+{
    6.54+	u32int *enable;
    6.55+
    6.56+	if(soc.armlocal == 0)
    6.57+		return;
    6.58+	enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
    6.59+	*enable = 0;
    6.60+	if(m->machno){
    6.61+		enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
    6.62+		*enable = 1;
    6.63+	}
    6.64+}
    6.65+
    6.66+void
    6.67+intrsoff(void)
    6.68+{
    6.69+	Intregs *ip;
    6.70+	int disable;
    6.71+
    6.72+	ip = (Intregs*)INTREGS;
    6.73+	disable = ~0;
    6.74+	ip->GPUdisable[0] = disable;
    6.75+	ip->GPUdisable[1] = disable;
    6.76+	ip->ARMdisable = disable;
    6.77+	ip->FIQctl = 0;
    6.78+}
    6.79+
    6.80+/*
    6.81+ *  called by trap to handle irq interrupts.
    6.82+ *  returns true iff a clock interrupt, thus maybe reschedule.
    6.83+ */
    6.84+int
    6.85+irq(Ureg* ureg)
    6.86+{
    6.87+	Vctl *v;
    6.88+	int clockintr;
    6.89+
    6.90+	clockintr = 0;
    6.91+	for(v = vctl[m->machno]; v != nil; v = v->next)
    6.92+		if((*v->reg & v->mask) != 0){
    6.93+			coherence();
    6.94+			v->f(ureg, v->a);
    6.95+			coherence();
    6.96+			if(v->irq == IRQclock || v->irq == IRQcntps || v->irq == IRQcntpns)
    6.97+				clockintr = 1;
    6.98+		}
    6.99+	return clockintr;
   6.100+}
   6.101+
   6.102+/*
   6.103+ * called direct from lexception.s to handle fiq interrupt.
   6.104+ */
   6.105+void
   6.106+fiq(Ureg *ureg)
   6.107+{
   6.108+	Vctl *v;
   6.109+
   6.110+	v = vfiq;
   6.111+	if(v == nil)
   6.112+		panic("cpu%d: unexpected item in bagging area", m->machno);
   6.113+	m->intr++;
   6.114+	ureg->pc -= 4;
   6.115+	coherence();
   6.116+	v->f(ureg, v->a);
   6.117+	coherence();
   6.118+}
   6.119+
   6.120+void
   6.121+irqenable(int irq, void (*f)(Ureg*, void*), void* a)
   6.122+{
   6.123+	Vctl *v;
   6.124+	Intregs *ip;
   6.125+	u32int *enable;
   6.126+	int cpu;
   6.127+
   6.128+	ip = (Intregs*)INTREGS;
   6.129+	if((v = xalloc(sizeof(Vctl))) == nil)
   6.130+		panic("irqenable: no mem");
   6.131+	cpu = 0;
   6.132+	v->irq = irq;
   6.133+	if(irq >= IRQlocal){
   6.134+		cpu = m->machno;
   6.135+		v->reg = (u32int*)(ARMLOCAL + Localintpending) + cpu;
   6.136+		if(irq >= IRQmbox0)
   6.137+			enable = (u32int*)(ARMLOCAL + Localmboxint) + cpu;
   6.138+		else
   6.139+			enable = (u32int*)(ARMLOCAL + Localtimerint) + cpu;
   6.140+		v->mask = 1 << (irq - IRQlocal);
   6.141+	}else if(irq >= IRQbasic){
   6.142+		enable = &ip->ARMenable;
   6.143+		v->reg = &ip->ARMpending;
   6.144+		v->mask = 1 << (irq - IRQbasic);
   6.145+	}else{
   6.146+		enable = &ip->GPUenable[irq/32];
   6.147+		v->reg = &ip->GPUpending[irq/32];
   6.148+		v->mask = 1 << (irq % 32);
   6.149+	}
   6.150+	v->f = f;
   6.151+	v->a = a;
   6.152+	lock(&vctllock);
   6.153+	if(irq == IRQfiq){
   6.154+		assert((ip->FIQctl & Fiqenable) == 0);
   6.155+		assert((*enable & v->mask) == 0);
   6.156+		vfiq = v;
   6.157+		ip->FIQctl = Fiqenable | irq;
   6.158+	}else{
   6.159+		v->next = vctl[cpu];
   6.160+		vctl[cpu] = v;
   6.161+		if(irq >= IRQmbox0){
   6.162+			if(irq <= IRQmbox3)
   6.163+				*enable |= 1 << (irq - IRQmbox0);
   6.164+		}else if(irq >= IRQlocal)
   6.165+			*enable |= 1 << (irq - IRQlocal);
   6.166+		else
   6.167+			*enable = v->mask;
   6.168+	}
   6.169+	unlock(&vctllock);
   6.170+}
     7.1--- a/sys/src/9/bcm/main.c
     7.2+++ b/sys/src/9/bcm/main.c
     7.3@@ -367,7 +367,7 @@ bootargs(uintptr base)
     7.4 	 * of the argument list checked in syscall.
     7.5 	 */
     7.6 	i = oargblen+1;
     7.7-	p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(Tos) - i));
     7.8+	p = (void*)STACKALIGN(base + BY2PG - sizeof(Tos) - i);
     7.9 	memmove(p, oargb, i);
    7.10 
    7.11 	/*
    7.12@@ -379,7 +379,7 @@ bootargs(uintptr base)
    7.13 	 * not the usual (int argc, char* argv[])
    7.14 	 */
    7.15 	av = (char**)(p - (oargc+1)*sizeof(char*));
    7.16-	ssize = base + BY2PG - PTR2UINT(av);
    7.17+	ssize = base + BY2PG - (uintptr)av;
    7.18 	for(i = 0; i < oargc; i++)
    7.19 		*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
    7.20 	*av = nil;
    7.21@@ -415,8 +415,8 @@ userinit(void)
    7.22 	/*
    7.23 	 * Kernel Stack
    7.24 	 */
    7.25-	p->sched.pc = PTR2UINT(init0);
    7.26-	p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
    7.27+	p->sched.pc = (uintptr)init0;
    7.28+	p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
    7.29 	p->sched.sp = STACKALIGN(p->sched.sp);
    7.30 
    7.31 	/*
    7.32@@ -445,7 +445,7 @@ userinit(void)
    7.33 	pg->txtflush = ~0;
    7.34 	segpage(s, pg);
    7.35 	k = kmap(s->map[0]->pages[0]);
    7.36-	memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
    7.37+	memmove((void*)VA(k), initcode, sizeof initcode);
    7.38 	kunmap(k);
    7.39 
    7.40 	ready(p);
    7.41@@ -485,7 +485,7 @@ confinit(void)
    7.42 		conf.mem[0].limit = conf.mem[0].base + memsize;
    7.43 
    7.44 	conf.npage = 0;
    7.45-	pa = PADDR(PGROUND(PTR2UINT(end)));
    7.46+	pa = PADDR(PGROUND((uintptr)end));
    7.47 
    7.48 	/*
    7.49 	 *  we assume that the kernel is at the beginning of one of the
     8.1--- a/sys/src/9/bcm/mkfile
     8.2+++ b/sys/src/9/bcm/mkfile
     8.3@@ -49,6 +49,7 @@ OBJ=\
     8.4 	fpi.$O\
     8.5 	fpiarm.$O\
     8.6 	fpimem.$O\
     8.7+	irq.$O\
     8.8 	main.$O\
     8.9 	mmu.$O\
    8.10 	random.$O\
     9.1--- a/sys/src/9/bcm/mmu.c
     9.2+++ b/sys/src/9/bcm/mmu.c
     9.3@@ -91,7 +91,7 @@ mmul2empty(Proc* proc, int clear)
     9.4 	l2 = &proc->mmul2;
     9.5 	for(page = *l2; page != nil; page = page->next){
     9.6 		if(clear)
     9.7-			memset(UINT2PTR(page->va), 0, L2size);
     9.8+			memset((void*)page->va, 0, L2size);
     9.9 		l1[page->daddr] = Fault;
    9.10 		l2 = &page->next;
    9.11 	}
    9.12@@ -241,7 +241,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
    9.13 				m->mmul1hi = L1hi - x;
    9.14 		}
    9.15 	}
    9.16-	pte = UINT2PTR(KADDR(PPN(*l1)));
    9.17+	pte = KADDR(PPN(*l1));
    9.18 
    9.19 	/* protection bits are
    9.20 	 *	PTERONLY|PTEVALID;
    9.21@@ -283,7 +283,7 @@ mmuuncache(void* v, usize size)
    9.22 	 * Uncache a Section, must already be
    9.23 	 * valid in the MMU.
    9.24 	 */
    9.25-	va = PTR2UINT(v);
    9.26+	va = (uintptr)v;
    9.27 	assert(!(va & (1*MiB-1)) && size == 1*MiB);
    9.28 
    9.29 	x = L1X(va);
    10.1--- a/sys/src/9/bcm/trap.c
    10.2+++ b/sys/src/9/bcm/trap.c
    10.3@@ -12,18 +12,8 @@
    10.4 
    10.5 #include "arm.h"
    10.6 
    10.7-#define INTREGS		(VIRTIO+0xB200)
    10.8-
    10.9-typedef struct Intregs Intregs;
   10.10-typedef struct Vctl Vctl;
   10.11-
   10.12 enum {
   10.13 	Nvec = 8,		/* # of vectors at start of lexception.s */
   10.14-	Fiqenable = 1<<7,
   10.15-
   10.16-	Localtimerint	= 0x40,
   10.17-	Localmboxint	= 0x50,
   10.18-	Localintpending	= 0x60,
   10.19 };
   10.20 
   10.21 /*
   10.22@@ -34,31 +24,6 @@ typedef struct Vpage0 {
   10.23 	u32int	vtable[Nvec];
   10.24 } Vpage0;
   10.25 
   10.26-/*
   10.27- * interrupt control registers
   10.28- */
   10.29-struct Intregs {
   10.30-	u32int	ARMpending;
   10.31-	u32int	GPUpending[2];
   10.32-	u32int	FIQctl;
   10.33-	u32int	GPUenable[2];
   10.34-	u32int	ARMenable;
   10.35-	u32int	GPUdisable[2];
   10.36-	u32int	ARMdisable;
   10.37-};
   10.38-
   10.39-struct Vctl {
   10.40-	Vctl	*next;
   10.41-	int	irq;
   10.42-	u32int	*reg;
   10.43-	u32int	mask;
   10.44-	void	(*f)(Ureg*, void*);
   10.45-	void	*a;
   10.46-};
   10.47-
   10.48-static Lock vctllock;
   10.49-static Vctl *vctl[MAXMACH], *vfiq;
   10.50-
   10.51 static char *trapnames[PsrMask+1] = {
   10.52 	[ PsrMusr ] "user mode",
   10.53 	[ PsrMfiq ] "fiq interrupt",
   10.54@@ -70,6 +35,7 @@ static char *trapnames[PsrMask+1] = {
   10.55 	[ PsrMsys ] "sys trap",
   10.56 };
   10.57 
   10.58+extern int irq(Ureg*);
   10.59 extern int notify(Ureg*);
   10.60 
   10.61 /*
   10.62@@ -102,127 +68,6 @@ trapinit(void)
   10.63 	coherence();
   10.64 }
   10.65 
   10.66-void
   10.67-intrcpushutdown(void)
   10.68-{
   10.69-	u32int *enable;
   10.70-
   10.71-	if(soc.armlocal == 0)
   10.72-		return;
   10.73-	enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
   10.74-	*enable = 0;
   10.75-	if(m->machno){
   10.76-		enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
   10.77-		*enable = 1;
   10.78-	}
   10.79-}
   10.80-
   10.81-void
   10.82-intrsoff(void)
   10.83-{
   10.84-	Intregs *ip;
   10.85-	int disable;
   10.86-
   10.87-	ip = (Intregs*)INTREGS;
   10.88-	disable = ~0;
   10.89-	ip->GPUdisable[0] = disable;
   10.90-	ip->GPUdisable[1] = disable;
   10.91-	ip->ARMdisable = disable;
   10.92-	ip->FIQctl = 0;
   10.93-}
   10.94-
   10.95-/*
   10.96- *  called by trap to handle irq interrupts.
   10.97- *  returns true iff a clock interrupt, thus maybe reschedule.
   10.98- */
   10.99-static int
  10.100-irq(Ureg* ureg)
  10.101-{
  10.102-	Vctl *v;
  10.103-	int clockintr;
  10.104-
  10.105-	clockintr = 0;
  10.106-	for(v = vctl[m->machno]; v != nil; v = v->next)
  10.107-		if((*v->reg & v->mask) != 0){
  10.108-			coherence();
  10.109-			v->f(ureg, v->a);
  10.110-			coherence();
  10.111-			if(v->irq == IRQclock || v->irq == IRQcntps || v->irq == IRQcntpns)
  10.112-				clockintr = 1;
  10.113-		}
  10.114-	return clockintr;
  10.115-}
  10.116-
  10.117-/*
  10.118- * called direct from lexception.s to handle fiq interrupt.
  10.119- */
  10.120-void
  10.121-fiq(Ureg *ureg)
  10.122-{
  10.123-	Vctl *v;
  10.124-
  10.125-	v = vfiq;
  10.126-	if(v == nil)
  10.127-		panic("cpu%d: unexpected item in bagging area", m->machno);
  10.128-	m->intr++;
  10.129-	ureg->pc -= 4;
  10.130-	coherence();
  10.131-	v->f(ureg, v->a);
  10.132-	coherence();
  10.133-}
  10.134-
  10.135-void
  10.136-irqenable(int irq, void (*f)(Ureg*, void*), void* a)
  10.137-{
  10.138-	Vctl *v;
  10.139-	Intregs *ip;
  10.140-	u32int *enable;
  10.141-	int cpu;
  10.142-
  10.143-	ip = (Intregs*)INTREGS;
  10.144-	if((v = xalloc(sizeof(Vctl))) == nil)
  10.145-		panic("irqenable: no mem");
  10.146-	cpu = 0;
  10.147-	v->irq = irq;
  10.148-	if(irq >= IRQlocal){
  10.149-		cpu = m->machno;
  10.150-		v->reg = (u32int*)(ARMLOCAL + Localintpending) + cpu;
  10.151-		if(irq >= IRQmbox0)
  10.152-			enable = (u32int*)(ARMLOCAL + Localmboxint) + cpu;
  10.153-		else
  10.154-			enable = (u32int*)(ARMLOCAL + Localtimerint) + cpu;
  10.155-		v->mask = 1 << (irq - IRQlocal);
  10.156-	}else if(irq >= IRQbasic){
  10.157-		enable = &ip->ARMenable;
  10.158-		v->reg = &ip->ARMpending;
  10.159-		v->mask = 1 << (irq - IRQbasic);
  10.160-	}else{
  10.161-		enable = &ip->GPUenable[irq/32];
  10.162-		v->reg = &ip->GPUpending[irq/32];
  10.163-		v->mask = 1 << (irq % 32);
  10.164-	}
  10.165-	v->f = f;
  10.166-	v->a = a;
  10.167-	lock(&vctllock);
  10.168-	if(irq == IRQfiq){
  10.169-		assert((ip->FIQctl & Fiqenable) == 0);
  10.170-		assert((*enable & v->mask) == 0);
  10.171-		vfiq = v;
  10.172-		ip->FIQctl = Fiqenable | irq;
  10.173-	}else{
  10.174-		v->next = vctl[cpu];
  10.175-		vctl[cpu] = v;
  10.176-		if(irq >= IRQmbox0){
  10.177-			if(irq <= IRQmbox3)
  10.178-				*enable |= 1 << (irq - IRQmbox0);
  10.179-		}else if(irq >= IRQlocal)
  10.180-			*enable |= 1 << (irq - IRQlocal);
  10.181-		else
  10.182-			*enable = v->mask;
  10.183-	}
  10.184-	unlock(&vctllock);
  10.185-}
  10.186-
  10.187 static char *
  10.188 trapname(int psr)
  10.189 {
  10.190@@ -560,7 +405,7 @@ callwithureg(void (*fn)(Ureg*))
  10.191 	Ureg ureg;
  10.192 
  10.193 	ureg.pc = getcallerpc(&fn);
  10.194-	ureg.sp = PTR2UINT(&fn);
  10.195+	ureg.sp = (uintptr)&fn;
  10.196 	fn(&ureg);
  10.197 }
  10.198 
    11.1--- a/sys/src/9/bcm/uartmini.c
    11.2+++ b/sys/src/9/bcm/uartmini.c
    11.3@@ -47,7 +47,7 @@ extern PhysUart miniphysuart;
    11.4 
    11.5 static Uart miniuart = {
    11.6 	.regs	= (u32int*)AUXREGS,
    11.7-	.name	= "uart0",
    11.8+	.name	= "uart1",
    11.9 	.freq	= 250000000,
   11.10 	.baud	= 115200,
   11.11 	.phys	= &miniphysuart,
   11.12@@ -100,7 +100,7 @@ enable(Uart *uart, int ie)
   11.13 	ap[MuCntl] = TxEn|RxEn;
   11.14 	baud(uart, uart->baud);
   11.15 	if(ie){
   11.16-		intrenable(IRQaux, interrupt, uart, 0, "uart");
   11.17+		intrenable(IRQaux, interrupt, uart, 0, uart->name);
   11.18 		ap[MuIer] = RxIen|TxIen;
   11.19 	}else
   11.20 		ap[MuIer] = 0;
   11.21@@ -259,7 +259,7 @@ donothing(Uart*, int)
   11.22 {
   11.23 }
   11.24 
   11.25-void
   11.26+static void
   11.27 putc(Uart*, int c)
   11.28 {
   11.29 	u32int *ap;
   11.30@@ -272,7 +272,7 @@ putc(Uart*, int c)
   11.31 		;
   11.32 }
   11.33 
   11.34-int
   11.35+static int
   11.36 getc(Uart*)
   11.37 {
   11.38 	u32int *ap;
   11.39@@ -283,38 +283,8 @@ getc(Uart*)
   11.40 	return ap[MuIo] & 0xFF;
   11.41 }
   11.42 
   11.43-void
   11.44-uartconsinit(void)
   11.45-{
   11.46-	Uart *uart;
   11.47-	int n;
   11.48-	char *p, *cmd;
   11.49-
   11.50-	if((p = getconf("console")) == nil)
   11.51-		return;
   11.52-	n = strtoul(p, &cmd, 0);
   11.53-	if(p == cmd)
   11.54-		return;
   11.55-	switch(n){
   11.56-	default:
   11.57-		return;
   11.58-	case 0:
   11.59-		uart = &miniuart;
   11.60-		break;
   11.61-	}
   11.62-
   11.63-	if(!uart->enabled)
   11.64-		(*uart->phys->enable)(uart, 0);
   11.65-	uartctl(uart, "l8 pn s1");
   11.66-	if(*cmd != '\0')
   11.67-		uartctl(uart, cmd);
   11.68-
   11.69-	consuart = uart;
   11.70-	uart->console = 1;
   11.71-}
   11.72-
   11.73 PhysUart miniphysuart = {
   11.74-	.name		= "miniuart",
   11.75+	.name		= "mini",
   11.76 	.pnp		= pnp,
   11.77 	.enable		= enable,
   11.78 	.disable	= disable,
   11.79@@ -332,31 +302,3 @@ PhysUart miniphysuart = {
   11.80 	.getc		= getc,
   11.81 	.putc		= putc,
   11.82 };
   11.83-
   11.84-void
   11.85-okay(int on)
   11.86-{
   11.87-	static int first;
   11.88-	static int okled, polarity;
   11.89-	char *p;
   11.90-
   11.91-	if(!first++){
   11.92-		p = getconf("bcm2709.disk_led_gpio");
   11.93-		if(p == nil)
   11.94-			p = getconf("bcm2708.disk_led_gpio");
   11.95-		if(p != nil)
   11.96-			okled = strtol(p, 0, 0);
   11.97-		else
   11.98-			okled = 'v';
   11.99-		p = getconf("bcm2709.disk_led_active_low");
  11.100-		if(p == nil)
  11.101-			p = getconf("bcm2708.disk_led_active_low");
  11.102-		polarity = (p == nil || *p == '1');
  11.103-		if(okled != 'v')
  11.104-			gpiosel(okled, Output);
  11.105-	}
  11.106-	if(okled == 'v')
  11.107-		vgpset(0, on);
  11.108-	else if(okled != 0)
  11.109-		gpioout(okled, on^polarity);
  11.110-}
    12.1new file mode 100644
    12.2--- /dev/null
    12.3+++ b/sys/src/9/bcm/uartpl011.c
    12.4@@ -0,0 +1,303 @@
    12.5+/*
    12.6+ * bcm2835 PL011 uart
    12.7+ */
    12.8+
    12.9+#include "u.h"
   12.10+#include "../port/lib.h"
   12.11+#include "../port/error.h"
   12.12+#include "mem.h"
   12.13+#include "dat.h"
   12.14+#include "fns.h"
   12.15+#include "io.h"
   12.16+
   12.17+enum {
   12.18+	DR	=	0x00>>2,
   12.19+	RSRECR	=	0x04>>2,
   12.20+	FR	=	0x18>>2,
   12.21+		TXFE	= 1<<7,
   12.22+		RXFF	= 1<<6,
   12.23+		TXFF	= 1<<5,
   12.24+		RXFE	= 1<<4,
   12.25+		BUSY	= 1<<3,
   12.26+
   12.27+	ILPR	=	0x20>>2,
   12.28+	IBRD	=	0x24>>2,
   12.29+	FBRD	=	0x28>>2,
   12.30+	LCRH	=	0x2c>>2,
   12.31+		WLENM	= 3<<5,
   12.32+		WLEN8	= 3<<5,
   12.33+		WLEN7	= 2<<5,
   12.34+		WLEN6	= 1<<5,
   12.35+		WLEN5	= 0<<5,
   12.36+		FEN	= 1<<4,	/* fifo enable */
   12.37+		STP2	= 1<<3,	/* 2 stop bits */
   12.38+		EPS	= 1<<2,	/* even parity select */
   12.39+		PEN	= 1<<1,	/* parity enabled */
   12.40+		BRK	= 1<<0,	/* send break */
   12.41+
   12.42+	CR	=	0x30>>2,
   12.43+		CTSEN	= 1<<15,
   12.44+		RTSEN	= 1<<14,
   12.45+		RTS	= 1<<11,
   12.46+		RXE	= 1<<9,
   12.47+		TXE	= 1<<8,
   12.48+		LBE	= 1<<7,
   12.49+		UARTEN	= 1<<0,
   12.50+		
   12.51+	IFLS	=	0x34>>2,
   12.52+	IMSC	=	0x38>>2,
   12.53+		TXIM	= 1<<5,
   12.54+		RXIM	= 1<<4,
   12.55+
   12.56+	RIS	=	0x3c>>2,
   12.57+	MIS	=	0x40>>2,
   12.58+	ICR	=	0x44>>2,
   12.59+	DMACR	=	0x48>>2,
   12.60+	ITCR	=	0x80>>2,
   12.61+	ITIP	=	0x84>>2,
   12.62+	ITOP	=	0x88>>2,
   12.63+	TDR	=	0x8c>>2,
   12.64+};
   12.65+
   12.66+extern PhysUart pl011physuart;
   12.67+
   12.68+static Uart pl011uart = {
   12.69+	.regs	= (u32int*)(VIRTIO+0x201000),
   12.70+	.name	= "uart0",
   12.71+	.freq	= 250000000,
   12.72+	.baud	= 115200,
   12.73+	.phys	= &pl011physuart,
   12.74+};
   12.75+
   12.76+static Uart*
   12.77+pnp(void)
   12.78+{
   12.79+	return &pl011uart;
   12.80+}
   12.81+
   12.82+static void
   12.83+interrupt(Ureg*, void *arg)
   12.84+{
   12.85+	Uart *uart = arg;
   12.86+	u32int *reg = (u32int*)uart->regs;
   12.87+
   12.88+	coherence();
   12.89+	if((reg[FR] & TXFE) == 0)
   12.90+		uartkick(uart);
   12.91+	while((reg[FR] & RXFE) == 0)
   12.92+		uartrecv(uart, reg[DR] & 0xFF);
   12.93+	coherence();
   12.94+
   12.95+}
   12.96+
   12.97+static void
   12.98+enable(Uart *uart, int ie)
   12.99+{
  12.100+	u32int *reg = (u32int*)uart->regs;
  12.101+
  12.102+	reg[CR] = UARTEN | RXE | TXE;
  12.103+	if(ie){
  12.104+		intrenable(IRQuart, interrupt, uart, 0, uart->name);
  12.105+		reg[IMSC] = TXIM|RXIM;
  12.106+	} else {
  12.107+		reg[IMSC] = 0;
  12.108+	}
  12.109+}
  12.110+
  12.111+static void
  12.112+disable(Uart *uart)
  12.113+{
  12.114+	u32int *reg = (u32int*)uart->regs;
  12.115+
  12.116+	reg[IMSC] = 0;
  12.117+	reg[CR] = 0;
  12.118+}
  12.119+
  12.120+static void
  12.121+kick(Uart *uart)
  12.122+{
  12.123+	u32int *reg = (u32int*)uart->regs;
  12.124+
  12.125+	if(uart->blocked)
  12.126+		return;
  12.127+	coherence();
  12.128+	while((reg[FR] & TXFF) == 0){
  12.129+		if(uart->op >= uart->oe && uartstageoutput(uart) == 0)
  12.130+			break;
  12.131+		reg[DR] = *(uart->op++);
  12.132+	}
  12.133+	coherence();
  12.134+}
  12.135+
  12.136+static void
  12.137+dobreak(Uart *uart, int ms)
  12.138+{
  12.139+	u32int *reg = (u32int*)uart->regs;
  12.140+
  12.141+	reg[LCRH] |= BRK;
  12.142+	delay(ms);
  12.143+	reg[LCRH] &= ~BRK;
  12.144+}
  12.145+
  12.146+static int
  12.147+baud(Uart *uart, int n)
  12.148+{
  12.149+	u32int *reg = (u32int*)uart->regs;
  12.150+
  12.151+	if(uart->freq <= 0 || n <= 0)
  12.152+		return -1;
  12.153+
  12.154+	reg[IBRD] = (uart->freq >> 4) / n;
  12.155+	reg[FBRD] = (uart->freq >> 4) % n;
  12.156+	uart->baud = n;
  12.157+	return 0;
  12.158+}
  12.159+
  12.160+static int
  12.161+bits(Uart *uart, int n)
  12.162+{
  12.163+	u32int *reg = (u32int*)uart->regs;
  12.164+
  12.165+	switch(n){
  12.166+	case 8:
  12.167+		reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN8;
  12.168+		break;
  12.169+	case 7:
  12.170+		reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN7;
  12.171+		break;
  12.172+	case 6:
  12.173+		reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN6;
  12.174+		break;
  12.175+	case 5:
  12.176+		reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN5;
  12.177+		break;
  12.178+	default:
  12.179+		return -1;
  12.180+	}
  12.181+	uart->bits = n;
  12.182+	return 0;
  12.183+}
  12.184+
  12.185+static int
  12.186+stop(Uart *uart, int n)
  12.187+{
  12.188+	u32int *reg = (u32int*)uart->regs;
  12.189+
  12.190+	switch(n){
  12.191+	case 1:
  12.192+		reg[LCRH] &= ~STP2;
  12.193+		break;
  12.194+	case 2:
  12.195+		reg[LCRH] |= STP2;
  12.196+		break;
  12.197+	default:
  12.198+		return -1;
  12.199+	}
  12.200+	uart->stop = n;
  12.201+	return 0;
  12.202+}
  12.203+
  12.204+static int
  12.205+parity(Uart *uart, int n)
  12.206+{
  12.207+	u32int *reg = (u32int*)uart->regs;
  12.208+
  12.209+	switch(n){
  12.210+	case 'n':
  12.211+		reg[LCRH] &= ~PEN;
  12.212+		break;
  12.213+	case 'e':
  12.214+		reg[LCRH] |= EPS | PEN;
  12.215+		break;
  12.216+	case 'o':
  12.217+		reg[LCRH] = (reg[LCRH] & ~EPS) | PEN;
  12.218+		break;
  12.219+	default:
  12.220+		return -1;
  12.221+	}
  12.222+	uart->parity = n;
  12.223+	return 0;
  12.224+}
  12.225+
  12.226+static void
  12.227+modemctl(Uart *uart, int on)
  12.228+{
  12.229+	uart->modem = on;
  12.230+}
  12.231+
  12.232+static void
  12.233+rts(Uart*, int)
  12.234+{
  12.235+}
  12.236+
  12.237+static long
  12.238+status(Uart *uart, void *buf, long n, long offset)
  12.239+{
  12.240+	char *p;
  12.241+
  12.242+	p = malloc(READSTR);
  12.243+	if(p == nil)
  12.244+		error(Enomem);
  12.245+	snprint(p, READSTR,
  12.246+		"b%d\n"
  12.247+		"dev(%d) type(%d) framing(%d) overruns(%d) "
  12.248+		"berr(%d) serr(%d)\n",
  12.249+
  12.250+		uart->baud,
  12.251+		uart->dev,
  12.252+		uart->type,
  12.253+		uart->ferr,
  12.254+		uart->oerr,
  12.255+		uart->berr,
  12.256+		uart->serr
  12.257+	);
  12.258+	n = readstr(offset, buf, n, p);
  12.259+	free(p);
  12.260+
  12.261+	return n;
  12.262+}
  12.263+
  12.264+static void
  12.265+donothing(Uart*, int)
  12.266+{
  12.267+}
  12.268+
  12.269+static void
  12.270+putc(Uart *uart, int c)
  12.271+{
  12.272+	u32int *reg = (u32int*)uart->regs;
  12.273+
  12.274+	while((reg[FR] & TXFF) != 0)
  12.275+		;
  12.276+	reg[DR] = c & 0xFF;
  12.277+}
  12.278+
  12.279+static int
  12.280+getc(Uart *uart)
  12.281+{
  12.282+	u32int *reg = (u32int*)uart->regs;
  12.283+
  12.284+	while((reg[FR] & RXFE) != 0)
  12.285+		;
  12.286+	return reg[DR] & 0xFF;
  12.287+}
  12.288+
  12.289+PhysUart pl011physuart = {
  12.290+	.name		= "pl011",
  12.291+	.pnp		= pnp,
  12.292+	.enable		= enable,
  12.293+	.disable	= disable,
  12.294+	.kick		= kick,
  12.295+	.dobreak	= dobreak,
  12.296+	.baud		= baud,
  12.297+	.bits		= bits,
  12.298+	.stop		= stop,
  12.299+	.parity		= parity,
  12.300+	.modemctl	= donothing,
  12.301+	.rts		= rts,
  12.302+	.dtr		= donothing,
  12.303+	.status		= status,
  12.304+	.fifo		= donothing,
  12.305+	.getc		= getc,
  12.306+	.putc		= putc,
  12.307+};
    13.1--- a/sys/src/9/bcm/vcore.c
    13.2+++ b/sys/src/9/bcm/vcore.c
    13.3@@ -149,7 +149,7 @@ vcreq(int tag, void *buf, int vallen, in
    13.4 		memmove(prop->data, buf, vallen);
    13.5 	cachedwbinvse(prop, prop->len);
    13.6 	for(;;){
    13.7-		aprop = busaddr? dmaaddr(prop) : PTR2UINT(prop);
    13.8+		aprop = busaddr? dmaaddr(prop) : (uintptr)prop;
    13.9 		vcwrite(ChanProps, aprop);
   13.10 		r = vcread(ChanProps);
   13.11 		if(r == aprop)
    14.1--- a/sys/src/9/kw/arch.c
    14.2+++ b/sys/src/9/kw/arch.c
    14.3@@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
    14.4 {
    14.5 	ureg->pc = p->sched.pc;
    14.6 	ureg->sp = p->sched.sp+4;
    14.7-	ureg->r14 = PTR2UINT(sched);
    14.8+	ureg->r14 = (uintptr)sched;
    14.9 }
   14.10 
   14.11 /*
   14.12@@ -95,8 +95,8 @@ linkproc(void)
   14.13 void
   14.14 kprocchild(Proc *p, void (*func)(void*), void *arg)
   14.15 {
   14.16-	p->sched.pc = PTR2UINT(linkproc);
   14.17-	p->sched.sp = PTR2UINT(p->kstack+KSTACK);
   14.18+	p->sched.pc = (uintptr)linkproc;
   14.19+	p->sched.sp = (uintptr)p->kstack+KSTACK;
   14.20 
   14.21 	p->kpfun = func;
   14.22 	p->kparg = arg;
    15.1--- a/sys/src/9/kw/fns.h
    15.2+++ b/sys/src/9/kw/fns.h
    15.3@@ -174,9 +174,6 @@ extern void kexit(Ureg*);
    15.4 #define	getpgcolor(a)	0
    15.5 #define	kmapinval()
    15.6 
    15.7-#define PTR2UINT(p)	((uintptr)(p))
    15.8-#define UINT2PTR(i)	((void*)(i))
    15.9-
   15.10 #define	waserror()	(up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
   15.11 
   15.12 /*
   15.13@@ -195,7 +192,7 @@ extern void kexit(Ureg*);
   15.14 /*
   15.15  * These are not good enough.
   15.16  */
   15.17-#define KADDR(pa)	UINT2PTR(KZERO|((uintptr)(pa)))
   15.18-#define PADDR(va)	PTR2UINT(((uintptr)(va)) & ~KSEGM)
   15.19+#define KADDR(pa)	((void*)(KZERO|((uintptr)(pa))))
   15.20+#define PADDR(va)	(((uintptr)(va)) & ~KSEGM)
   15.21 
   15.22 #define MASK(v)	((1UL << (v)) - 1)	/* mask `v' bits wide */
    16.1--- a/sys/src/9/kw/main.c
    16.2+++ b/sys/src/9/kw/main.c
    16.3@@ -460,7 +460,7 @@ bootargs(uintptr base)
    16.4 	 * of the argument list checked in syscall.
    16.5 	 */
    16.6 	i = oargblen+1;
    16.7-	p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
    16.8+	p = (void*)(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
    16.9 	memmove(p, oargb, i);
   16.10 
   16.11 	/*
   16.12@@ -473,7 +473,7 @@ bootargs(uintptr base)
   16.13 	 * unused so it doesn't matter (at the moment...).
   16.14 	 */
   16.15 	av = (char**)(p - (oargc+2)*sizeof(char*));
   16.16-	ssize = base + BY2PG - PTR2UINT(av);
   16.17+	ssize = base + BY2PG - (uintptr)av;
   16.18 	*av++ = (char*)oargc;
   16.19 	for(i = 0; i < oargc; i++)
   16.20 		*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
   16.21@@ -515,8 +515,8 @@ userinit(void)
   16.22 	/*
   16.23 	 * Kernel Stack
   16.24 	 */
   16.25-	p->sched.pc = PTR2UINT(init0);
   16.26-	p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
   16.27+	p->sched.pc = (uintptr)init0;
   16.28+	p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
   16.29 	p->sched.sp = STACKALIGN(p->sched.sp);
   16.30 
   16.31 	/*
   16.32@@ -545,7 +545,7 @@ userinit(void)
   16.33 	pg->txtflush = ~0;
   16.34 	segpage(s, pg);
   16.35 	k = kmap(s->map[0]->pages[0]);
   16.36-	memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
   16.37+	memmove((void*)VA(k), initcode, sizeof initcode);
   16.38 	kunmap(k);
   16.39 
   16.40 	ready(p);
   16.41@@ -578,7 +578,7 @@ confinit(void)
   16.42 	memmove(conf.mem, sheevamem, sizeof(sheevamem));
   16.43 
   16.44 	conf.npage = 0;
   16.45-	pa = PADDR(PGROUND(PTR2UINT(end)));
   16.46+	pa = PADDR(PGROUND((uintptr)end));
   16.47 
   16.48 	/*
   16.49 	 *  we assume that the kernel is at the beginning of one of the
    17.1--- a/sys/src/9/kw/mmu.c
    17.2+++ b/sys/src/9/kw/mmu.c
    17.3@@ -154,7 +154,7 @@ mmul2empty(Proc* proc, int clear)
    17.4 	l2 = &proc->mmul2;
    17.5 	for(page = *l2; page != nil; page = page->next){
    17.6 		if(clear)
    17.7-			memset(UINT2PTR(page->va), 0, BY2PG);
    17.8+			memset((void*)page->va, 0, BY2PG);
    17.9 		l1[page->daddr] = Fault;
   17.10 		l2 = &page->next;
   17.11 	}
   17.12@@ -301,7 +301,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
   17.13 		else{
   17.14 			pg = up->mmul2cache;
   17.15 			up->mmul2cache = pg->next;
   17.16-			memset(UINT2PTR(pg->va), 0, BY2PG);
   17.17+			memset((void*)pg->va, 0, BY2PG);
   17.18 		}
   17.19 		pg->daddr = x;
   17.20 		pg->next = up->mmul2;
   17.21@@ -323,7 +323,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
   17.22 				m->mmul1hi = x;
   17.23 		}
   17.24 	}
   17.25-	pte = UINT2PTR(KADDR(PPN(*l1)));
   17.26+	pte = (void*)KADDR(PPN(*l1));
   17.27 	//print("pte %#p index %ld %#ux\n", pte, L2X(va), *(pte+L2X(va)));
   17.28 
   17.29 	/* protection bits are
   17.30@@ -372,7 +372,7 @@ mmuuncache(void* v, usize size)
   17.31 	 * Uncache a Section, must already be
   17.32 	 * valid in the MMU.
   17.33 	 */
   17.34-	va = PTR2UINT(v);
   17.35+	va = (uintptr)v;
   17.36 	assert(!(va & (1*MiB-1)) && size == 1*MiB);
   17.37 
   17.38 	x = L1X(va);
   17.39@@ -459,7 +459,7 @@ vmap(uintptr pa, usize size)
   17.40 	 * will fail.
   17.41 	 */
   17.42 	if(pa+size < 4*MiB)
   17.43-		return UINT2PTR(kseg0|pa);
   17.44+		return (void*)(kseg0|pa);
   17.45 
   17.46 	osize = size;
   17.47 	o = pa & (BY2PG-1);
   17.48@@ -473,7 +473,7 @@ vmap(uintptr pa, usize size)
   17.49 		panic("vmap(%#p, %ld) called from %#p: mmukmap fails %#p",
   17.50 			pa+o, osize, getcallerpc(&pa), pae);
   17.51 
   17.52-	return UINT2PTR(va+o);
   17.53+	return (void*)(va+o);
   17.54 }
   17.55 
   17.56 /* from 386 */
    18.1--- a/sys/src/9/kw/syscall.c
    18.2+++ b/sys/src/9/kw/syscall.c
    18.3@@ -41,7 +41,7 @@ noted(Ureg* cur, uintptr arg0)
    18.4 	nf = up->ureg;
    18.5 
    18.6 	/* sanity clause */
    18.7-	if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
    18.8+	if(!okaddr((uintptr)nf, sizeof(NFrame), 0)){
    18.9 		qunlock(&up->debug);
   18.10 		pprint("bad ureg in noted %#p\n", nf);
   18.11 		pexit("Suicide", 0);
   18.12@@ -77,8 +77,8 @@ noted(Ureg* cur, uintptr arg0)
   18.13 		nf->arg1 = nf->msg;
   18.14 		nf->arg0 = &nf->ureg;
   18.15 		nf->ip = 0;
   18.16-		cur->sp = PTR2UINT(nf);
   18.17-		cur->r0 = PTR2UINT(nf->arg0);
   18.18+		cur->sp = (uintptr)nf;
   18.19+		cur->r0 = (uintptr)nf->arg0;
   18.20 		break;
   18.21 	default:
   18.22 		up->lastnote.flag = NDebug;
   18.23@@ -140,7 +140,7 @@ notify(Ureg* ureg)
   18.24 		qunlock(&up->debug);
   18.25 		pexit(n->msg, n->flag != NDebug);
   18.26 	}
   18.27-	if(!okaddr(PTR2UINT(up->notify), 1, 0)){
   18.28+	if(!okaddr((uintptr)up->notify, 1, 0)){
   18.29 		qunlock(&up->debug);
   18.30 		pprint("suicide: notify function address %#p\n", up->notify);
   18.31 		pexit("Suicide", 0);
   18.32@@ -153,7 +153,7 @@ notify(Ureg* ureg)
   18.33 		pexit("Suicide", 0);
   18.34 	}
   18.35 
   18.36-	nf = UINT2PTR(sp);
   18.37+	nf = (void*)sp;
   18.38 	memmove(&nf->ureg, ureg, sizeof(Ureg));
   18.39 	nf->old = up->ureg;
   18.40 	up->ureg = nf;
   18.41@@ -163,8 +163,8 @@ notify(Ureg* ureg)
   18.42 	nf->ip = 0;
   18.43 
   18.44 	ureg->sp = sp;
   18.45-	ureg->pc = PTR2UINT(up->notify);
   18.46-	ureg->r0 = PTR2UINT(nf->arg0);
   18.47+	ureg->pc = (uintptr)up->notify;
   18.48+	ureg->r0 = (uintptr)nf->arg0;
   18.49 
   18.50 	up->notified = 1;
   18.51 	up->nnote--;
    19.1--- a/sys/src/9/kw/trap.c
    19.2+++ b/sys/src/9/kw/trap.c
    19.3@@ -602,7 +602,7 @@ callwithureg(void (*fn)(Ureg*))
    19.4 	Ureg ureg;
    19.5 
    19.6 	ureg.pc = getcallerpc(&fn);
    19.7-	ureg.sp = PTR2UINT(&fn);
    19.8+	ureg.sp = (uintptr)&fn;
    19.9 	fn(&ureg);
   19.10 }
   19.11 
    20.1--- a/sys/src/9/omap/arch.c
    20.2+++ b/sys/src/9/omap/arch.c
    20.3@@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
    20.4 {
    20.5 	ureg->pc = p->sched.pc;
    20.6 	ureg->sp = p->sched.sp+4;
    20.7-	ureg->r14 = PTR2UINT(sched);
    20.8+	ureg->r14 = (uintptr)sched;
    20.9 }
   20.10 
   20.11 /*
   20.12@@ -95,8 +95,8 @@ linkproc(void)
   20.13 void
   20.14 kprocchild(Proc *p, void (*func)(void*), void *arg)
   20.15 {
   20.16-	p->sched.pc = PTR2UINT(linkproc);
   20.17-	p->sched.sp = PTR2UINT(p->kstack+KSTACK);
   20.18+	p->sched.pc = (uintptr)linkproc;
   20.19+	p->sched.sp = (uintptr)p->kstack+KSTACK;
   20.20 
   20.21 	p->kpfun = func;
   20.22 	p->kparg = arg;
    21.1--- a/sys/src/9/omap/fns.h
    21.2+++ b/sys/src/9/omap/fns.h
    21.3@@ -165,13 +165,10 @@ extern void kexit(Ureg*);
    21.4 #define	getpgcolor(a)	0
    21.5 #define	kmapinval()
    21.6 
    21.7-#define PTR2UINT(p)	((uintptr)(p))
    21.8-#define UINT2PTR(i)	((void*)(i))
    21.9-
   21.10 #define	waserror()	(up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
   21.11 
   21.12-#define KADDR(pa)	UINT2PTR(KZERO    | ((uintptr)(pa) & ~KSEGM))
   21.13-#define PADDR(va)	PTR2UINT(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
   21.14+#define KADDR(pa)	((void*)(KZERO | ((uintptr)(pa) & ~KSEGM)))
   21.15+#define PADDR(va)	(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
   21.16 
   21.17 #define wave(c) *(ulong *)PHYSCONS = (c)
   21.18 
    22.1--- a/sys/src/9/omap/main.c
    22.2+++ b/sys/src/9/omap/main.c
    22.3@@ -447,7 +447,7 @@ bootargs(uintptr base)
    22.4 	 * of the argument list checked in syscall.
    22.5 	 */
    22.6 	i = oargblen+1;
    22.7-	p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
    22.8+	p = (void*)(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
    22.9 	memmove(p, oargb, i);
   22.10 
   22.11 	/*
   22.12@@ -460,7 +460,7 @@ bootargs(uintptr base)
   22.13 	 * unused so it doesn't matter (at the moment...).
   22.14 	 */
   22.15 	av = (char**)(p - (oargc+2)*sizeof(char*));
   22.16-	ssize = base + BY2PG - PTR2UINT(av);
   22.17+	ssize = base + BY2PG - (uintptr)av;
   22.18 	*av++ = (char*)oargc;
   22.19 	for(i = 0; i < oargc; i++)
   22.20 		*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
   22.21@@ -502,8 +502,8 @@ userinit(void)
   22.22 	/*
   22.23 	 * Kernel Stack
   22.24 	 */
   22.25-	p->sched.pc = PTR2UINT(init0);
   22.26-	p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
   22.27+	p->sched.pc = (uintptr)init0;
   22.28+	p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
   22.29 	p->sched.sp = STACKALIGN(p->sched.sp);
   22.30 
   22.31 	/*
   22.32@@ -532,7 +532,7 @@ userinit(void)
   22.33 	pg->txtflush = ~0;
   22.34 	segpage(s, pg);
   22.35 	k = kmap(s->map[0]->pages[0]);
   22.36-	memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
   22.37+	memmove((void*)VA(k), initcode, sizeof initcode);
   22.38 	kunmap(k);
   22.39 
   22.40 	ready(p);
   22.41@@ -596,7 +596,7 @@ confinit(void)
   22.42 	memmove(conf.mem, omapmem, sizeof(omapmem));
   22.43 
   22.44 	conf.npage = 0;
   22.45-	pa = PADDR(PGROUND(PTR2UINT(end)));
   22.46+	pa = PADDR(PGROUND((uintptr)end));
   22.47 
   22.48 	/*
   22.49 	 *  we assume that the kernel is at the beginning of one of the
    23.1--- a/sys/src/9/omap/mmu.c
    23.2+++ b/sys/src/9/omap/mmu.c
    23.3@@ -138,7 +138,7 @@ mmul2empty(Proc* proc, int clear)
    23.4 	l2 = &proc->mmul2;
    23.5 	for(page = *l2; page != nil; page = page->next){
    23.6 		if(clear)
    23.7-			memset(UINT2PTR(page->va), 0, BY2PG);
    23.8+			memset((void*)page->va, 0, BY2PG);
    23.9 		l1[page->daddr] = Fault;
   23.10 		l2 = &page->next;
   23.11 	}
   23.12@@ -282,7 +282,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
   23.13 		else{
   23.14 			pg = up->mmul2cache;
   23.15 			up->mmul2cache = pg->next;
   23.16-			memset(UINT2PTR(pg->va), 0, BY2PG);
   23.17+			memset((void*)pg->va, 0, BY2PG);
   23.18 		}
   23.19 		pg->daddr = x;
   23.20 		pg->next = up->mmul2;
   23.21@@ -302,7 +302,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
   23.22 				m->mmul1hi = x;
   23.23 		}
   23.24 	}
   23.25-	pte = UINT2PTR(KADDR(PPN(*l1)));
   23.26+	pte = KADDR(PPN(*l1));
   23.27 	//print("pte %#p index %ld was %#ux\n", pte, L2X(va), *(pte+L2X(va)));
   23.28 
   23.29 	/* protection bits are
   23.30@@ -349,7 +349,7 @@ mmuuncache(void* v, usize size)
   23.31 	 * Uncache a Section, must already be
   23.32 	 * valid in the MMU.
   23.33 	 */
   23.34-	va = PTR2UINT(v);
   23.35+	va = (uintptr)v;
   23.36 	assert(!(va & (1*MiB-1)) && size == 1*MiB);
   23.37 
   23.38 	x = L1X(va);
   23.39@@ -433,7 +433,7 @@ vmap(uintptr pa, usize size)
   23.40 	 * will fail.
   23.41 	 */
   23.42 	if(pa+size < 4*MiB)
   23.43-		return UINT2PTR(kseg0|pa);
   23.44+		return (void*)(kseg0|pa);
   23.45 
   23.46 	osize = size;
   23.47 	o = pa & (BY2PG-1);
   23.48@@ -447,7 +447,7 @@ vmap(uintptr pa, usize size)
   23.49 		panic("vmap(%#p, %ld) called from %#p: mmukmap fails %#p",
   23.50 			pa+o, osize, getcallerpc(&pa), pae);
   23.51 
   23.52-	return UINT2PTR(va+o);
   23.53+	return (void*)(va+o);
   23.54 }
   23.55 
   23.56 /* from 386 */
    24.1--- a/sys/src/9/omap/syscall.c
    24.2+++ b/sys/src/9/omap/syscall.c
    24.3@@ -41,7 +41,7 @@ noted(Ureg* cur, uintptr arg0)
    24.4 	nf = up->ureg;
    24.5 
    24.6 	/* sanity clause */
    24.7-	if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
    24.8+	if(!okaddr((uintptr)nf, sizeof(NFrame), 0)){
    24.9 		qunlock(&up->debug);
   24.10 		pprint("bad ureg in noted %#p\n", nf);
   24.11 		pexit("Suicide", 0);
   24.12@@ -77,8 +77,8 @@ noted(Ureg* cur, uintptr arg0)
   24.13 		nf->arg1 = nf->msg;
   24.14 		nf->arg0 = &nf->ureg;
   24.15 		nf->ip = 0;
   24.16-		cur->sp = PTR2UINT(nf);
   24.17-		cur->r0 = PTR2UINT(nf->arg0);
   24.18+		cur->sp = (uintptr)nf;
   24.19+		cur->r0 = (uintptr)nf->arg0;
   24.20 		break;
   24.21 	default:
   24.22 		up->lastnote.flag = NDebug;
   24.23@@ -140,7 +140,7 @@ notify(Ureg* ureg)
   24.24 		qunlock(&up->debug);
   24.25 		pexit(n->msg, n->flag != NDebug);
   24.26 	}
   24.27-	if(!okaddr(PTR2UINT(up->notify), 1, 0)){
   24.28+	if(!okaddr((uintptr)up->notify, 1, 0)){
   24.29 		qunlock(&up->debug);
   24.30 		pprint("suicide: notify function address %#p\n", up->notify);
   24.31 		pexit("Suicide", 0);
   24.32@@ -153,7 +153,7 @@ notify(Ureg* ureg)
   24.33 		pexit("Suicide", 0);
   24.34 	}
   24.35 
   24.36-	nf = UINT2PTR(sp);
   24.37+	nf = (void*)sp;
   24.38 	memmove(&nf->ureg, ureg, sizeof(Ureg));
   24.39 	nf->old = up->ureg;
   24.40 	up->ureg = nf;
   24.41@@ -163,8 +163,8 @@ notify(Ureg* ureg)
   24.42 	nf->ip = 0;
   24.43 
   24.44 	ureg->sp = sp;
   24.45-	ureg->pc = PTR2UINT(up->notify);
   24.46-	ureg->r0 = PTR2UINT(nf->arg0);
   24.47+	ureg->pc = (uintptr)up->notify;
   24.48+	ureg->r0 = (uintptr)nf->arg0;
   24.49 
   24.50 	up->notified = 1;
   24.51 	up->nnote--;
    25.1--- a/sys/src/9/omap/trap.c
    25.2+++ b/sys/src/9/omap/trap.c
    25.3@@ -644,7 +644,7 @@ callwithureg(void (*fn)(Ureg*))
    25.4 	Ureg ureg;
    25.5 
    25.6 	ureg.pc = getcallerpc(&fn);
    25.7-	ureg.sp = PTR2UINT(&fn);
    25.8+	ureg.sp = (uintptr)&fn;
    25.9 	fn(&ureg);
   25.10 }
   25.11 
    26.1--- a/sys/src/9/port/syscallfmt.c
    26.2+++ b/sys/src/9/port/syscallfmt.c
    26.3@@ -114,7 +114,7 @@ syscallfmt(ulong syscallno, uintptr pc, 
    26.4 		a = va_arg(list, char*);
    26.5 		fmtuserstring(&fmt, a, "");
    26.6 		argv = va_arg(list, char**);
    26.7-		evenaddr(PTR2UINT(argv));
    26.8+		evenaddr((uintptr)argv);
    26.9 		for(;;){
   26.10 			validaddr((uintptr)argv, sizeof(char**), 0);
   26.11 			a = *(char **)argv;
    27.1--- a/sys/src/9/teg2/arch.c
    27.2+++ b/sys/src/9/teg2/arch.c
    27.3@@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
    27.4 {
    27.5 	ureg->pc = p->sched.pc;
    27.6 	ureg->sp = p->sched.sp+4;
    27.7-	ureg->r14 = PTR2UINT(sched);
    27.8+	ureg->r14 = (uintptr)sched;
    27.9 }
   27.10 
   27.11 /*
   27.12@@ -95,8 +95,8 @@ linkproc(void)
   27.13 void
   27.14 kprocchild(Proc *p, void (*func)(void*), void *arg)
   27.15 {
   27.16-	p->sched.pc = PTR2UINT(linkproc);
   27.17-	p->sched.sp = PTR2UINT(p->kstack+KSTACK);
   27.18+	p->sched.pc = (uintptr)linkproc;
   27.19+	p->sched.sp = (uintptr)p->kstack+KSTACK;
   27.20 
   27.21 	p->kpfun = func;
   27.22 	p->kparg = arg;
    28.1--- a/sys/src/9/teg2/fns.h
    28.2+++ b/sys/src/9/teg2/fns.h
    28.3@@ -217,12 +217,9 @@ extern void kexit(Ureg*);
    28.4 #define	getpgcolor(a)	0
    28.5 #define	kmapinval()
    28.6 
    28.7-#define PTR2UINT(p)	((uintptr)(p))
    28.8-#define UINT2PTR(i)	((void*)(i))
    28.9-
   28.10 #define	waserror()	(up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
   28.11 
   28.12-#define KADDR(pa)	UINT2PTR(KZERO    | ((uintptr)(pa) & ~KSEGM))
   28.13-#define PADDR(va)	PTR2UINT(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
   28.14+#define KADDR(pa)	((void*)(KZERO | ((uintptr)(pa) & ~KSEGM)))
   28.15+#define PADDR(va)	(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
   28.16 
   28.17 #define MASK(v)	((1UL << (v)) - 1)	/* mask `v' bits wide */
    29.1--- a/sys/src/9/teg2/main.c
    29.2+++ b/sys/src/9/teg2/main.c
    29.3@@ -643,7 +643,7 @@ bootargs(uintptr base)
    29.4 	 * of the argument list checked in syscall.
    29.5 	 */
    29.6 	i = oargblen+1;
    29.7-	p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
    29.8+	p = (void*)(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
    29.9 	memmove(p, oargb, i);
   29.10 
   29.11 	/*
   29.12@@ -656,7 +656,7 @@ bootargs(uintptr base)
   29.13 	 * unused so it doesn't matter (at the moment...).
   29.14 	 */
   29.15 	av = (char**)(p - (oargc+2)*sizeof(char*));
   29.16-	ssize = base + BY2PG - PTR2UINT(av);
   29.17+	ssize = base + BY2PG - (uintptr)av;
   29.18 	*av++ = (char*)oargc;
   29.19 	for(i = 0; i < oargc; i++)
   29.20 		*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
   29.21@@ -698,8 +698,8 @@ userinit(void)
   29.22 	/*
   29.23 	 * Kernel Stack
   29.24 	 */
   29.25-	p->sched.pc = PTR2UINT(init0);
   29.26-	p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
   29.27+	p->sched.pc = (uintptr)init0;
   29.28+	p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
   29.29 	p->sched.sp = STACKALIGN(p->sched.sp);
   29.30 
   29.31 	/*
   29.32@@ -728,7 +728,7 @@ userinit(void)
   29.33 	pg->txtflush = ~0;
   29.34 	segpage(s, pg);
   29.35 	k = kmap(s->map[0]->pages[0]);
   29.36-	memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
   29.37+	memmove((void*)VA(k), initcode, sizeof initcode);
   29.38 	kunmap(k);
   29.39 
   29.40 	ready(p);
   29.41@@ -797,7 +797,7 @@ confinit(void)
   29.42 	memmove(conf.mem, tsmem, sizeof(tsmem));
   29.43 
   29.44 	conf.npage = 0;
   29.45-	pa = PADDR(PGROUND(PTR2UINT(end)));
   29.46+	pa = PADDR(PGROUND((uintptr)end));
   29.47 
   29.48 	/*
   29.49 	 *  we assume that the kernel is at the beginning of one of the
    30.1--- a/sys/src/9/teg2/mmu.c
    30.2+++ b/sys/src/9/teg2/mmu.c
    30.3@@ -375,7 +375,7 @@ mmul2empty(Proc* proc, int clear)
    30.4 	l2 = &proc->mmul2;
    30.5 	for(page = *l2; page != nil; page = page->next){
    30.6 		if(clear)
    30.7-			memset(UINT2PTR(page->va), 0, BY2PG);
    30.8+			memset((void*)page->va, 0, BY2PG);
    30.9 		l1[page->daddr] = Fault;
   30.10 		allcache->wbse(l1, sizeof *l1);
   30.11 		l2 = &page->next;
   30.12@@ -527,7 +527,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
   30.13 		else{
   30.14 			pg = up->mmul2cache;
   30.15 			up->mmul2cache = pg->next;
   30.16-			memset(UINT2PTR(pg->va), 0, BY2PG);
   30.17+			memset((void*)pg->va, 0, BY2PG);
   30.18 		}
   30.19 		pg->daddr = x;
   30.20 		pg->next = up->mmul2;
   30.21@@ -549,7 +549,7 @@ putmmu(uintptr va, uintptr pa, Page* pag
   30.22 				m->mmul1hi = x;
   30.23 		}
   30.24 	}
   30.25-	pte = UINT2PTR(KADDR(PPN(*l1)));
   30.26+	pte = KADDR(PPN(*l1));
   30.27 	if (Debug) {
   30.28 		iprint("pte %#p index %ld was %#ux\n", pte, L2X(va), *(pte+L2X(va)));
   30.29 		if (*(pte+L2X(va)))
   30.30@@ -602,7 +602,7 @@ mmuuncache(void* v, usize size)
   30.31 	 * Uncache a Section, must already be
   30.32 	 * valid in the MMU.
   30.33 	 */
   30.34-	va = PTR2UINT(v);
   30.35+	va = (uintptr)v;
   30.36 	assert(!(va & (1*MiB-1)) && size == 1*MiB);
   30.37 
   30.38 	x = L1X(va);
   30.39@@ -687,7 +687,7 @@ vmap(uintptr pa, usize size)
   30.40 	 * will fail.
   30.41 	 */
   30.42 	if(pa+size < 4*MiB)
   30.43-		return UINT2PTR(kseg0|pa);
   30.44+		return (void*)(kseg0|pa);
   30.45 
   30.46 	osize = size;
   30.47 	o = pa & (BY2PG-1);
   30.48@@ -701,7 +701,7 @@ vmap(uintptr pa, usize size)
   30.49 		panic("vmap(%#p, %ld) called from %#p: mmukmap fails %#p",
   30.50 			pa+o, osize, getcallerpc(&pa), pae);
   30.51 
   30.52-	return UINT2PTR(va+o);
   30.53+	return (void*)(va+o);
   30.54 }
   30.55 
   30.56 /* from 386 */
    31.1--- a/sys/src/9/teg2/syscall.c
    31.2+++ b/sys/src/9/teg2/syscall.c
    31.3@@ -47,7 +47,7 @@ noted(Ureg* cur, uintptr arg0)
    31.4 	nf = up->ureg;
    31.5 
    31.6 	/* sanity clause */
    31.7-	if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
    31.8+	if(!okaddr((uintptr)nf, sizeof(NFrame), 0)){
    31.9 		qunlock(&up->debug);
   31.10 		pprint("bad ureg in noted %#p\n", nf);
   31.11 		pexit("Suicide", 0);
   31.12@@ -83,8 +83,8 @@ noted(Ureg* cur, uintptr arg0)
   31.13 		nf->arg1 = nf->msg;
   31.14 		nf->arg0 = &nf->ureg;
   31.15 		nf->ip = 0;
   31.16-		cur->sp = PTR2UINT(nf);
   31.17-		cur->r0 = PTR2UINT(nf->arg0);
   31.18+		cur->sp = (uintptr)nf;
   31.19+		cur->r0 = (uintptr)nf->arg0;
   31.20 		break;
   31.21 	default:
   31.22 		up->lastnote.flag = NDebug;
   31.23@@ -146,7 +146,7 @@ notify(Ureg* ureg)
   31.24 		qunlock(&up->debug);
   31.25 		pexit(n->msg, n->flag != NDebug);
   31.26 	}
   31.27-	if(!okaddr(PTR2UINT(up->notify), 1, 0)){
   31.28+	if(!okaddr((uintptr)up->notify, 1, 0)){
   31.29 		qunlock(&up->debug);
   31.30 		pprint("suicide: notify function address %#p\n", up->notify);
   31.31 		pexit("Suicide", 0);
   31.32@@ -159,7 +159,7 @@ notify(Ureg* ureg)
   31.33 		pexit("Suicide", 0);
   31.34 	}
   31.35 
   31.36-	nf = UINT2PTR(sp);
   31.37+	nf = (void*)sp;
   31.38 	memmove(&nf->ureg, ureg, sizeof(Ureg));
   31.39 	nf->old = up->ureg;
   31.40 	up->ureg = nf;
   31.41@@ -169,8 +169,8 @@ notify(Ureg* ureg)
   31.42 	nf->ip = 0;
   31.43 
   31.44 	ureg->sp = sp;
   31.45-	ureg->pc = PTR2UINT(up->notify);
   31.46-	ureg->r0 = PTR2UINT(nf->arg0);
   31.47+	ureg->pc = (uintptr)up->notify;
   31.48+	ureg->r0 = (uintptr)nf->arg0;
   31.49 
   31.50 	up->notified = 1;
   31.51 	up->nnote--;
    32.1--- a/sys/src/9/teg2/trap.c
    32.2+++ b/sys/src/9/teg2/trap.c
    32.3@@ -937,7 +937,7 @@ callwithureg(void (*fn)(Ureg*))
    32.4 
    32.5 	memset(&ureg, 0, sizeof ureg);
    32.6 	ureg.pc = getcallerpc(&fn);
    32.7-	ureg.sp = PTR2UINT(&fn);
    32.8+	ureg.sp = (uintptr)&fn;
    32.9 	fn(&ureg);
   32.10 }
   32.11