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Mercurial > hg > plan9front / changeset: bcm: intrenable() can happen from any cpu in case of dma interrupts

changeset 6873: cd256cc052e3
parent 6872: 95cc803be43b
child 6874: 469fa1f309de
author: cinap_lenrek@felloff.net
date: Thu, 08 Nov 2018 20:26:32 +0100
files: sys/src/9/bcm/trap.c
description: bcm: intrenable() can happen from any cpu in case of dma interrupts
     1.1--- a/sys/src/9/bcm/trap.c
     1.2+++ b/sys/src/9/bcm/trap.c
     1.3@@ -177,17 +177,20 @@ irqenable(int irq, void (*f)(Ureg*, void
     1.4 	Vctl *v;
     1.5 	Intregs *ip;
     1.6 	u32int *enable;
     1.7+	int cpu;
     1.8 
     1.9 	ip = (Intregs*)INTREGS;
    1.10 	if((v = xalloc(sizeof(Vctl))) == nil)
    1.11 		panic("irqenable: no mem");
    1.12+	cpu = 0;
    1.13 	v->irq = irq;
    1.14 	if(irq >= IRQlocal){
    1.15-		v->reg = (u32int*)(ARMLOCAL + Localintpending) + m->machno;
    1.16+		cpu = m->machno;
    1.17+		v->reg = (u32int*)(ARMLOCAL + Localintpending) + cpu;
    1.18 		if(irq >= IRQmbox0)
    1.19-			enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
    1.20+			enable = (u32int*)(ARMLOCAL + Localmboxint) + cpu;
    1.21 		else
    1.22-			enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
    1.23+			enable = (u32int*)(ARMLOCAL + Localtimerint) + cpu;
    1.24 		v->mask = 1 << (irq - IRQlocal);
    1.25 	}else if(irq >= IRQbasic){
    1.26 		enable = &ip->ARMenable;
    1.27@@ -207,8 +210,8 @@ irqenable(int irq, void (*f)(Ureg*, void
    1.28 		vfiq = v;
    1.29 		ip->FIQctl = Fiqenable | irq;
    1.30 	}else{
    1.31-		v->next = vctl[m->machno];
    1.32-		vctl[m->machno] = v;
    1.33+		v->next = vctl[cpu];
    1.34+		vctl[cpu] = v;
    1.35 		if(irq >= IRQmbox0){
    1.36 			if(irq <= IRQmbox3)
    1.37 				*enable |= 1 << (irq - IRQmbox0);